;***** Amoric ORIC 48K Emulator V0.9. Amiga 680x0 version *****
;*** Copyright 1995-96 JF FABRE (fabre@supaero.fr) ***

;*** CPU 6502 Emulation

; Register functionnality :

; D0   : **scratch**
; d1.b : A
; d2.b : X
; d3.b : Y
; d4.b : P
; d5.b : S
; D6   : **scratch**
; D7   : **scratch**

; a0.l : Mem Ptr
; a1.l : Mem Ptr + $304
; a2.l : Functable pour les instructions
; a3.l : Pointeur sur diverses tables
; a4.l : PC+Base Adr
; a5.l : **Scratch**
; a6.l : **Scratch**

        XDEF    _FunctTable
	XDEF	_MiscTable

        XDEF    _InitFonctions
        XDEF    _BRK
        XDEF    _IRQ
        XDEF    _LDA
        XDEF    _RTS
        
	XDEF	_TapeMemPtr
	XDEF	_TapeMemSize
	XDEF	_TapeMemOffset

	XDEF	_NextJump

	XREF	_BreakReason
	XREF	_ReturnToMonitor
	XREF	@Place

	XREF	_Which8912Reg

	XREF	_Reg8912

	XREF	_OricMem

	include	"my_defs.i"
	include	"my_macros.asm"
	include	"CPUmacros_xxx.asm"
	include	"rompatches.i"

SETFUNCT: MACRO
	move.l	#\2,D0
	lsl.l	#2,D0
	move.l	#\1,(A1,D0.L)
	ENDM

; *** Elaboration de certaines fonctions ***
; *** (Merci les macros !!!) ***


	MODESADD	LDA
	MODESADD	LDX
	MODESADD	LDY
	
	MODESADD	STA
	MODESADD	STX
	MODESADD	STY

	MODESADD	CMP
	MODESADD	CPX
	MODESADD	CPY

	MODESADD	AND
	MODESADD	EOR
	MODESADD	ORA

	MODESADD	ADC
	MODESADD	SBC

	MODESADD	INC
	MODESADD	DEC

	MODESADD	LSR
	MODESADD	ASL
	MODESADD	ROL
	MODESADD	ROR	
	MODESADD	BIT

; *** Decalages ***

LogicalShiftRight:MACRO
	lsr.b	#1,\1
	TEST_NZC
	ENDM

ArithmeticShiftLeft:MACRO
	asl.b	#1,\1
	TEST_NZC
	ENDM

RotateRight:MACRO
	SET_C2X
	roxr.b	#1,\1
	TEST_NZC
	ENDM

RotateLeft:MACRO
	SET_C2X
	roxl.b	#1,\1
	TEST_NZC
	ENDM	
			
; *** Mettre une banque de fonctions a en valeur

SetFunctionBank:
	STORE_REGS
	move.w	#$F,D2
	
SFBLoop:
	move.l	D0,D1
	lsl.l	#2,D1
	move.l	A2,(A1,D1.L)

	add.l	#$10,D0
	dbf	D2,SFBLoop

	RESTORE_REGS
	rts

; *** Initialiser les fonctions ***

_InitFonctions:
	lea	_FunctTable,A1
	lea	IllegalInstruction(PC),A2
	move.l	#$FF,D0
IFLoop:
	move.l	A2,(A1)+
	dbf	D0,IFLoop

	lea	_FunctTable,A1

	moveq.l	#2,D0
	lea	IllegalInstruction(PC),A2
	bsr	SetFunctionBank

	moveq.l	#3,D0
	lea	NOP2(PC),A2
	bsr	SetFunctionBank
	moveq.l	#4,D0
	bsr	SetFunctionBank
	moveq.l	#7,D0
	bsr	SetFunctionBank

	moveq.l	#$A,D0
	lea	NOP(PC),A2
	bsr	SetFunctionBank
	moveq.l	#$B,D0
	bsr	SetFunctionBank

	moveq.l	#$C,D0
	lea	NOP3(PC),A2
	bsr	SetFunctionBank
	move.b	#$F,D0
	bsr	SetFunctionBank


	SETFUNCT _BRK,$00
	SETFUNCT JSR,$20
	SETFUNCT JMP_IMM,$4C
	SETFUNCT JMP_IND,$6C
	SETFUNCT RTS,$60
	SETFUNCT RTI,$40
	SETFUNCT ADC_ZRP,$65
	SETFUNCT ADC_IMM,$69
	SETFUNCT ADC_ZRPX,$75
	SETFUNCT ADC_INDX,$61
	SETFUNCT ADC_INDY,$71
	SETFUNCT ADC_ABS,$6D
	SETFUNCT ADC_ABSX,$7D
	SETFUNCT ADC_ABSY,$79
	SETFUNCT SBC_ZRP,$E5
	SETFUNCT SBC_IMM,$E9
	SETFUNCT SBC_ZRPX,$F5
	SETFUNCT SBC_INDX,$E1
	SETFUNCT SBC_INDY,$F1
	SETFUNCT SBC_ABS,$ED
	SETFUNCT SBC_ABSX,$FD
	SETFUNCT SBC_ABSY,$F9
	SETFUNCT BIT_ZRP,$24
	SETFUNCT BIT_ABS,$2C
	SETFUNCT STA_INDX,$81
	SETFUNCT STA_ABS,$8D
	SETFUNCT STA_ABSX,$9D
	SETFUNCT STA_ABSY,$99
	SETFUNCT STA_INDY,$91
	SETFUNCT STA_ZRP,$85
	SETFUNCT STA_ZRPX,$95
	SETFUNCT STX_ZRP,$86
	SETFUNCT STX_ZRPY,$96
	SETFUNCT STX_ABS,$8E
	SETFUNCT STY_ZRP,$84
	SETFUNCT STY_ZRPX,$94
	SETFUNCT STY_ABS,$8C
	SETFUNCT LDY_IMM,$A0
	SETFUNCT LDY_ZRP,$A4
	SETFUNCT LDY_ZRPX,$B4
	SETFUNCT LDY_ABS,$AC
	SETFUNCT LDY_ABSX,$BC
	SETFUNCT LDX_IMM,$A2
	SETFUNCT LDX_ZRP,$A6
	SETFUNCT LDX_ZRPY,$B6
	SETFUNCT LDX_ABS,$AE
	SETFUNCT LDX_ABSY,$BE
	SETFUNCT LDA_IMM,$A9
	SETFUNCT LDA_ZRP,$A5
	SETFUNCT LDA_ZRPX,$B5
	SETFUNCT LDA_INDX,$A1
	SETFUNCT LDA_INDY,$B1
	SETFUNCT LDA_ABS,$AD
	SETFUNCT LDA_ABSX,$BD
	SETFUNCT LDA_ABSY,$B9
	SETFUNCT AND_IMM,$29
	SETFUNCT AND_ZRP,$25
	SETFUNCT AND_ZRPX,$35
	SETFUNCT AND_INDX,$21
	SETFUNCT AND_INDY,$31
	SETFUNCT AND_ABS,$2D
	SETFUNCT AND_ABSX,$3D
	SETFUNCT AND_ABSY,$39
	SETFUNCT EOR_IMM,$49
	SETFUNCT EOR_ZRP,$45
	SETFUNCT EOR_ZRPX,$55
	SETFUNCT EOR_INDX,$41
	SETFUNCT EOR_INDY,$51
	SETFUNCT EOR_ABS,$4D
	SETFUNCT EOR_ABSX,$5D
	SETFUNCT EOR_ABSY,$59
	SETFUNCT ORA_IMM,$09
	SETFUNCT ORA_ZRP,$05
	SETFUNCT ORA_ZRPX,$15
	SETFUNCT ORA_INDX,$01
	SETFUNCT ORA_INDY,$11
	SETFUNCT ORA_ABS,$0D
	SETFUNCT ORA_ABSX,$1D
	SETFUNCT ORA_ABSY,$19
	SETFUNCT CMP_ZRP,$C5
	SETFUNCT CMP_IMM,$C9
	SETFUNCT CMP_INDY,$D1
	SETFUNCT CMP_INDX,$C1
	SETFUNCT CMP_ZRPX,$D5
	SETFUNCT CMP_ABS,$CD
	SETFUNCT CMP_ABSX,$DD
	SETFUNCT CMP_ABSY,$D9
	SETFUNCT CPX_IMM,$E0
	SETFUNCT CPX_ZRP,$E4
	SETFUNCT CPX_ABS,$EC
	SETFUNCT CPY_IMM,$C0
	SETFUNCT CPY_ZRP,$C4
	SETFUNCT CPY_ABS,$CC
	SETFUNCT BCC,$90
	SETFUNCT BCS,$B0
	SETFUNCT BEQ,$F0
	SETFUNCT BNE,$D0
	SETFUNCT BMI,$30
	SETFUNCT BPL,$10
	SETFUNCT BVC,$50
	SETFUNCT BVS,$70
	SETFUNCT CLD,$D8
	SETFUNCT SED,$F8
	SETFUNCT CLC,$18
	SETFUNCT SEC,$38
	SETFUNCT CLI,$58
	SETFUNCT SEI,$78
	SETFUNCT CLV,$B8
	SETFUNCT NOP,$EA
	SETFUNCT TXA,$8A
	SETFUNCT TXS,$9A
	SETFUNCT TYA,$98
	SETFUNCT TSX,$BA
	SETFUNCT TAY,$A8
	SETFUNCT TAX,$AA
	SETFUNCT INX,$E8
	SETFUNCT INY,$C8
	SETFUNCT DEX,$CA
	SETFUNCT DEY,$88
	SETFUNCT PHA,$48
	SETFUNCT PHP,$08
	SETFUNCT PLA,$68
	SETFUNCT PLP,$28
	SETFUNCT ROL_IMP,$2A
	SETFUNCT ROL_ZRP,$26
	SETFUNCT ROL_ZRPX,$36
	SETFUNCT ROL_ABS,$2E
	SETFUNCT ROL_ABSX,$3E
	SETFUNCT ROR_IMP,$6A
	SETFUNCT ROR_ZRP,$66
	SETFUNCT ROR_ZRPX,$76
	SETFUNCT ROR_ABS,$6E
	SETFUNCT ROR_ABSX,$7E
	SETFUNCT ASL_IMP,$0A
	SETFUNCT ASL_ZRP,$06
	SETFUNCT ASL_ZRPX,$16
	SETFUNCT ASL_ABS,$0E
	SETFUNCT ASL_ABSX,$1E
	SETFUNCT LSR_IMP,$4A
	SETFUNCT LSR_ZRP,$46
	SETFUNCT LSR_ZRPX,$56
	SETFUNCT LSR_ABS,$4E
	SETFUNCT LSR_ABSX,$5E
	SETFUNCT DEC_ZRP,$C6
	SETFUNCT DEC_ZRPX,$D6
	SETFUNCT DEC_ABS,$CE
	SETFUNCT DEC_ABSX,$DE
	SETFUNCT INC_ZRP,$E6
	SETFUNCT INC_ZRPX,$F6
	SETFUNCT INC_ABS,$EE
	SETFUNCT INC_ABSX,$FE
	SETFUNCT TrapOPCode,$07
	SETFUNCT TrapOPCode,BREAK_CODE
	SETFUNCT TrapOPCode,PATCH_CODE

; *** Quelques instructions non documentees
; Remplacees par des NOP avec PC+=1 2 ou 3

	SETFUNCT NOP,$80
	SETFUNCT NOP,$89

	SETFUNCT NOP3,$0C
	SETFUNCT NOP3,$9E

	move.l	#STACK_BEGIN,D5 ; initialiser le mot haut de la pile.
			
	rts

_FunctTable:
	blk.l 256

; *** Instructions illegales ***

IllegalInstruction
	BAD_INST	ILLEGAL_INSTRUCTION
	

; *** Instructions Trappees ***
; *** Breakpoints ou instructions foireuses

TrapOPCode:
	move.b	-1(A4),D6	; Instruction courante

	cmp.b	#PATCH_CODE,D6
	beq	PatchOperation

	cmp.b	#BREAK_CODE,D6
	bne.b	NotaBreakpoint
	BAD_INST	BREAKPOINT
NotaBreakpoint:
	BAD_INST	ILLEGAL_INSTRUCTION	



; ******* LDA *********
; ******* A=D1.B ******
; ******* Param:D6.L ******

LDA:
_LDA:
	LDz	D1
	
LDA_IMM:
	LDz_IMM	D1

; ******* LDX *********
; ******* X=D2.B ******
; ******* Param:D6.L ******

LDX:
	LDz	D2

LDX_IMM:
	LDz_IMM	D2
	
; ******* LDY *********
; ******* Y=D3.B ******
; ******* Param:D6.L ******

LDY:
	LDz	D3

LDY_IMM:
	LDz_IMM	D3

; ******* STA *********
; ******* Adresse:D6 ******

STA:
	STz	D1

; ******* STX *********
; ******* Adresse:D6 ******

STX:
	STz	D2

; ******* STY *********
; ******* Adresse:D6 ******

STY:
	STz	D3
		
; ******* CMP *********
; ******* A=D1.B ******
; ******* Param:D6.L ******

CMP:
	CPz	D1
CMP_IMM:
	CPz_IMM	D1
	
; ******* CPX *********
; ******* X=D2.B ******
; ******* Param:D6.L ******

CPX:
	CPz	D2
CPX_IMM:
	CPz_IMM	D2
	
; ******* CPY *********
; ******* Y=D3.B ******
; ******* Param:D6.L ******

CPY:
	CPz	D3

CPY_IMM:
	CPz_IMM	D3
	
; ******* ADC *********
; ******* A=D1.B ******
; ******* Param:D6.L ******

ADC:
	move.b	(A0,D6.L),D7
	ADC_MACRO
ADC_IMM:
	move.b	(A4)+,D7
	ADC_MACRO
	
; ******* SBC *********
; ******* A=D1.B ******
; ******* Param:D6.b ******

SBC:
	move.b	(A0,D6.L),D7
	SBC_MACRO

SBC_IMM:
	move.b	(A4)+,D7
	SBC_MACRO


; ******* EOR Immediat *********
; ******* A=D1.B ******
; ******* Param:D6.b ******

EOR_IMM:
	MOVE.B	(A4)+,D6
	EOR.B	D6,D1
	TEST_NZ
	GOOD_INST

; ******* EOR *********
; ******* A=D1.B ******
; ******* Param:D6.b ******

EOR:
	MOVE.B	(A0,D6.L),D6
	EOR.B	D6,D1
	TEST_NZ
	GOOD_INST
	
; ******* ORA Immediat *********
; ******* A=D1.B ******
; ******* Param:D6.b ******

ORA_IMM:
	MOVE.B	(A4)+,D6
	OR.B	D6,D1
	TEST_NZ
	GOOD_INST

; ******* ORA *********
; ******* A=D1.B ******
; ******* Param:D6.b ******

ORA:
	MOVE.B	(A0,D6.L),D6
	OR.B	D6,D1
	TEST_NZ
	GOOD_INST
	
; ******* AND Immediat*********
; ******* A=D1.B ******
; ******* Param:D6.b ******

AND_IMM:
	MOVE.B	(A4)+,D6
	AND.B	D6,D1
	TEST_NZ
	GOOD_INST
	
; ******* AND *********
; ******* A=D1.B ******
; ******* Param:D6.b ******

AND:
	MOVE.B	(A0,D6.L),D6
	AND.B	D6,D1
	TEST_NZ
	GOOD_INST
	

; ******* INC *********
; ******* A=D1.B ******
; ******* Param:D6 ******

INC:
	move.b	(A0,D6.L),D7
	addq.b	#1,D7
	TEST_NZ
	jsr	@Place
	GOOD_INST

; ******* DEC *********
; ******* A=D1.B ******
; ******* Param:D6 ******

DEC:
	move.b	(A0,D6.L),D7
	subq.b	#1,D7
	TEST_NZ
	jsr	@Place
	GOOD_INST

; ******* BIT Immediat *********
; ******* A=D1.B ******
; ******* Param:D6 ******

BIT_IMM:
	move.b	(A4)+,D6
	BIT_MACRO
	GOOD_INST

; ******* BIT *********
; ******* A=D1.B ******
; ******* Param:D6 ******

BIT:
	move.b	(A0,D6.L),D6
	BIT_MACRO
	GOOD_INST

; ******* LSR *********
; ******* Param:D6 ******

LSR:
	move.b	(A0,D6.L),D7  ; M[D6] -> D7
	LogicalShiftRight	D7
	jsr	@Place
	GOOD_INST

; ******* ASL *********
; ******* Param:D6 ******

ASL:
	move.b	(A0,D6.L),D7  ; M[D6] -> D7
	ArithmeticShiftLeft	D7
	jsr	@Place
	GOOD_INST
	
; ******* ROR *********
; ******* Param:D6 ******

ROR:
	move.b	(A0,D6.L),D7  ; M[D6] -> D7
	RotateRight	D7
	jsr	@Place
	GOOD_INST
	
; ******* ROL *********
; ******* Param:D6 ******

ROL:
	move.b	(A0,D6.L),D7  ; M[D6] -> D7
	RotateLeft	D7
	jsr	@Place
	GOOD_INST

; ******* LSR IMPLICITE *********
; ******* Param:D6 ******

LSR_IMP:
	LogicalShiftRight	D1
	GOOD_INST
		
; ******* ASL *********
; ******* Param:D6 ******

ASL_IMP:
	ArithmeticShiftLeft	D1
	GOOD_INST
	
; ******* ROR *********
; ******* Param:D6 ******

ROR_IMP:
	RotateRight	D1
	GOOD_INST
	
; ******* ROL *********
; ******* Param:D6 ******

ROL_IMP:
	RotateLeft	D1
	GOOD_INST
	

; *** BRK ***

_BRK:
	addq.l	#2,A4	; Saute une instruction en retour
	SAVE_ADR
	GET_WORD	$FFFE
	move.l	D6,A4
	add.l	A0,A4

	EMPILER D4
	bset	#B_BIT,D4		; ** bit B mis **

	GOOD_INST

_IRQ:
	addq.l	#1,A4
	SAVE_ADR
	GET_WORD	$FFFE
	move.l	D6,A4
	add.l	A0,A4

	EMPILER D4

	GOOD_INST


; *** JSR ***

JSR:
	addq.l	#2,A4
	SAVE_ADR
	subq.l	#2,A4
	ABSOLU
	move.l	D6,A4
	add.l	A0,A4
	GOOD_INST
	

; *** JMP Immediat ***

JMP_IMM:
	ABSOLU
	move.l	D6,A4
	add.l	A0,A4
	GOOD_INST

; *** JMP Indirect ***

JMP_IND:
	INDIRECT
	move.l	D6,A4
	add.l	A0,A4
	GOOD_INST

; *** RTS ***

RTS:
_RTS:
	RESTORE_ADR
	addq.l	#1,A4
	GOOD_INST

; *** RTI ***

RTI:
	DEPILER	D4					
	RESTORE_ADR
	GOOD_INST

; *** BCC ***

BCC:
	DONT_BRANCH	C_BIT

; *** BCS ***

BCS:
	BRANCH		C_BIT

; *** BEQ ***

BEQ:
	BRANCH		Z_BIT
	
; *** BNE ***

BNE:
	DONT_BRANCH	Z_BIT

; *** BMI ***

BMI:
	BRANCH		N_BIT

; *** BPL ***

BPL:
	DONT_BRANCH	N_BIT
	
; *** BVC ***

BVC:
	DONT_BRANCH	V_BIT
	
; *** BVS ***

BVS:
	BRANCH		V_BIT
	
; *** CLC ***

CLC:
	CLEAR_BIT_P	C_BIT
	
; *** CLD ***

CLD:
	CLEAR_BIT_P	D_BIT

; *** CLI ***

CLI:
	CLEAR_BIT_P	I_BIT

; *** CLV ***

CLV:
	CLEAR_BIT_P	V_BIT

; *** SEC ***

SEC:
	SET_BIT_P	C_BIT
	
; *** SED ***

SED:
	SET_BIT_P	D_BIT

; *** SEI ***

SEI:
	SET_BIT_P	I_BIT

; *** NOP ***

NOP:
	GOOD_INST

NOP2:
	addq.l	#1,A4
	GOOD_INST

NOP3:
	addq.l	#2,A4
	GOOD_INST

; *** TXA ***

TXA:
	Txy	D2,D1

; *** TAX ***

TAX:
	Txy	D1,D2

; *** TAY ***

TAY:
	Txy	D1,D3
	
; *** TYA ***

TYA:
	Txy	D3,D1

; *** TXS ***
; ** On n'utilise pas Txy car
; ** Il n'y a pas de test de condition

TXS:
	move.b	D2,D5
	GOOD_INST	

; *** TSX ***

TSX:
	Txy	D5,D2

; *** INX ***

INX
	addq.b	#1,D2
	TEST_NZ
	GOOD_INST
	
; *** INY ***

INY
	addq.b	#1,D3
	TEST_NZ
	GOOD_INST
	
; *** DEX ***

DEX
	subq.b	#1,D2
	TEST_NZ
	GOOD_INST
	
; *** DEY ***

DEY
	subq.b	#1,D3
	TEST_NZ
	GOOD_INST
	
; *** PHA ***

PHA:
	EMPILER	D1
	GOOD_INST
	
; *** PLA ***

PLA:
	DEPILER D1
	TEST_NZ
	GOOD_INST

; *** PHP ***

PHP:
	EMPILER	D4
	GOOD_INST
	
; *** PLP ***

PLP:
	DEPILER D4
	GOOD_INST


; *** No other OP Code. Too bad. There would have been so many bugs to remove.

; Patch Operation : D0 : PC de l'appel

NoTapeIn:
	GOOD_INST

PatchOperation:
	subq.l	#1,A4

	; *** Selon PC, on va voir quelle routine
	; *** Est sollicitee

	move.l	A4,D7
	sub.l	A0,D7	; D7 = PC
	lea	IO_OricRoutineTable(PC),A6
	moveq.l	#0,D0
	subq.l	#1,D0
	TO_LOOP
PatchOutbyt:
	bra.w	RTS

PatchRdbyte:
	tst.l	_TapeMemPtr
	beq.b	NoTapeIn

	bsr.b	LireOctet
	tst.b	D7
	bne.b	NoTapeIn
	move.b	D0,D1	; LDA D7
	TEST_NZ
	CLR_PB	C_BIT
	bra.w	RTS

PatchSync:
	tst.l	_TapeMemPtr
	beq.b	NoTapeIn

	bsr.b	LireOctet
	tst.b	D7
	bne.b	NoTapeIn
	cmp.b	#$16,D0
	bne.b	PatchSync
	bsr.b	LireOctet
	cmp.b	#$16,D0
	bne.b	PatchSync
	bsr.b	LireOctet
	cmp.b	#$16,D0
	bne.b	PatchSync
EndPatchSync:
	moveq.l	#0,D2	; X=0
	CLR_PB	C_BIT
	bra.w	RTS

PatchOutchr:
	bra.w	RTS

; *** Lire un octet
; In : Rien
; Out : D7 = 0 si ok -1 sinon
;       D0 = Valeur octet

LireOctet:
	move.l	_TapeMemSize(PC),D7
	addq.l	#1,D7
	cmp.l	_TapeMemOffset(PC),D7
	beq.b	LO_EOT
	move.l	_TapeMemPtr(PC),A6
	add.l	_TapeMemOffset(PC),A6	; A6->Octet a lire
	move.b	(A6),D0
	add.l	#1,_TapeMemOffset
	moveq.l	#0,D7
	rts
LO_EOT:
	moveq.l	#-1,D7	; Fin de bande
	rts

TOFock:
	BAD_INST	ILLEGAL_INSTRUCTION	

PatchW8912:
	move.b	D1,_Reg8912
	move.b	D1,D3		; Copier dans Y

	move.b	D2,D7
	cmp.b	#$7,D1
	bne.b	NotReg7
	ori.b	#$40,D7
NotReg7:
	ECRIRE_PAGE3	#$1
	ECRIRE_PAGE3	#$F
	move.b	#$CC,D1
	move.b	D1,D2

	jsr	_Which8912Reg
	bra.w	RTS

; *** Fast Reset pour Atmos

FastResetAtm:
	bsr.b	FastFill

	move.l	A0,A4
	add.l	#J_FRESET_ATM+$21,A4	; PC = $FA5D

	GOOD_INST

; *** Fast Reset pour Oric 1

FastResetOr1:
	bsr.b	FastFill

	bra	RTS

; Fast Fill, remplace la routine originale

FastFill:
	STORE_REGS
	move.l	_OricMem,A0
	move.w	#$2EFC,D6	; (C000-400-1)/4
	add.l	#$400,A0
	move.l	#$55555555,D7
FFLoop:
	move.l	D7,(A0)+
	dbf	D6,FFLoop

	move.l	_OricMem,A0
	move.w	#$00C0,$C(A0)	; $C000 a l'envers

	RESTORE_REGS
	rts

IO_OricRoutineTable:
	dc.w	J_W8912_ATM,J_OUTBYT_ATM,J_RDBYTE_ATM,J_SYNC_ATM,J_OUTCHR_ATM,J_FRESET_ATM
	dc.w	J_W8912_OR1,J_OUTBYT_OR1,J_RDBYTE_OR1,J_SYNC_OR1,J_OUTCHR_OR1,J_FRESET_OR1,0


IO_AmigaRoutineTable:
	dc.l	PatchW8912,PatchOutbyt,PatchRdbyte,PatchSync,PatchOutchr,FastResetAtm
	dc.l	PatchW8912,PatchOutbyt,PatchRdbyte,PatchSync,PatchOutchr,FastResetOr1

_TapeMemOffset:
	dc.l	0
_TapeMemPtr:
	dc.l	0
_TapeMemSize:
	dc.l	0

_NextJump:
	dc.l	0

_MiscTable:
TabP:
TabNZ:
	dc.b	$0	; Position 0 pour 68K	0000
	dc.b	$0	; C=1 mais on s'en fout	0001
	dc.b	$0	; V=1 "" 	""	0010
	dc.b	$0	; C=1 V=1		0011
	dc.b	$2	; Z=1			0100
	dc.b	$2	; Z=1 C=1		0101
	dc.b	$2	; Z=1 V=1		0110
	dc.b	$2	; Z=1 V=1 C=1		0111
	dc.b	$80	; N=1			1000
	dc.b	$80	; N=1 C=1		1001
	dc.b	$80	; N=1 V=1		1010
	dc.b	$80	; N=1 V=1 C=1		1011
	dc.b	$82	; N=1 Z=1		1100
	dc.b	$82	; N=1 Z=1 C=1		1101
	dc.b	$82	; N=1 Z=1 V=1		1110
	dc.b	$82	; N=1 Z=1 V=1 C=1	1111
TabNZC:
	dc.b	$0	; Position 0 pour 68K	0000
	dc.b	$1	; C=1			0001
	dc.b	$0	; V=1			0010
	dc.b	$1	; C=1 V=1		0011
	dc.b	$2	; Z=1			0100
	dc.b	$3	; Z=1 C=1		0101
	dc.b	$2	; Z=1 V=1		0110
	dc.b	$3	; Z=1 V=1 C=1		0111
	dc.b	$80	; N=1			1000
	dc.b	$81	; N=1 C=1		1001
	dc.b	$80	; N=1 V=1		1010
	dc.b	$81	; N=1 V=1 C=1		1011
	dc.b	$82	; N=1 Z=1		1100
	dc.b	$83	; N=1 Z=1 C=1		1101
	dc.b	$82	; N=1 Z=1 V=1		1110
	dc.b	$83	; N=1 Z=1 V=1 C=1	1111
TabNZCV:
	dc.b	$0	; Position 0 pour 68K	0000
	dc.b	$1	; C=1			0001
	dc.b	$40	; V=1			0010
	dc.b	$41	; C=1 V=1		0011
	dc.b	$2	; Z=1			0100
	dc.b	$3	; Z=1 C=1		0101
	dc.b	$42	; Z=1 V=1		0110
	dc.b	$43	; Z=1 V=1 C=1		0111
	dc.b	$80	; N=1			1000
	dc.b	$81	; N=1 C=1		1001
	dc.b	$C0	; N=1 V=1		1010
	dc.b	$C1	; N=1 V=1 C=1		1011
	dc.b	$82	; N=1 Z=1		1100
	dc.b	$83	; N=1 Z=1 C=1		1101
	dc.b	$C2	; N=1 Z=1 V=1		1110
	dc.b	$C3	; N=1 Z=1 V=1 C=1	1111

TabNZC_CMP:
	dc.b	$80	; Position 0 pour 68K	0000
	dc.b	$81	; C=1			0001
	dc.b	$80	; V=1 On s'en fout	0010
	dc.b	$81	; C=1 V=1		0011
	dc.b	$3	; Z=1			0100
	dc.b	$3	; Z=1 C=1		0101
	dc.b	$3	; Z=1 V=1		0110
	dc.b	$3	; Z=1 V=1 C=1		0111
	dc.b	$0	; N=1			1000
	dc.b	$1	; N=1 C=1		1001
	dc.b	$0	; N=1 V=1		1010
	dc.b	$1	; N=1 V=1 C=1		1011
	dc.b	$3	; N=1 Z=1		1100
	dc.b	$3	; N=1 Z=1 C=1		1101
	dc.b	$3	; N=1 Z=1 V=1		1110
	dc.b	$3	; N=1 Z=1 V=1 C=1	1111