


XF86_Accel(1)					    XF86_Accel(1)


NAME
       XF86_Accel  - accelerated X Window System servers for UNIX
       on x86 platforms with an S3, Mach8, Mach32, Mach64, P9000,
       AGX, ET4000/W32 or 8514/A accelerator board

SYNOPSIS
       XF86_S3 [:displaynumber] [ option ] ...

       XF86_Mach8 [:displaynumber] [ option ] ...

       XF86_Mach32 [:displaynumber] [ option ] ...

       XF86_Mach64 [:displaynumber] [ option ] ...

       XF86_P9000 [:displaynumber] [ option ] ...

       XF86_AGX [:displaynumber] [ option ] ...

       XF86_W32 [:displaynumber] [ option ] ...

       XF86_8514 [:displaynumber] [ option ] ...

DESCRIPTION
       XF86_S3	is  an	8-bit  PseudoColor,  16-bit TrueColor and
       24-bit TrueColor server for S3 graphic accelerator boards.
       Note,  16-bit and 24-bit operation is not supported on all
       S3 accelerator boards.  Refer to README.S3 for details  of
       which boards are supported at which depths.

       XF86_Mach8  is  an  8-bit PseudoColor server for ATI Mach8
       graphic accelerator boards.

       XF86_Mach32 is an 8-bit PseudoColor and	16-bit	TrueColor
       server  for  ATI Mach32 graphic accelerator boards.  Note,
       16-bit operation is not supported on all Mach32	accelera-
       tor boards.

       XF86_Mach64 is an 8-bit PseudoColor, 16-bit TrueColor, and
       24-bit TrueColor	 server for ATI Mach64 graphic	accelera-
       tor boards.

       XF86_P9000  is an 8-bit PseudoColor, 16-bit TrueColor, and
       24-bit TrueColor server	for  Weitek  Power  9000  (P9000)
       graphic accelerator boards.

       XF86_AGX	 is  an	 8-bit	PseudoColor  server  for  AGX/XGA
       graphic accelerator boards.

       XF86_W32 is an 8-bit PseudoColor	 server	 for  ET4000/W32,
       ET4000/W32i and ET4000/W32p grpahic accelerator boards.

       XF86_8514  is  an  8-bit	 PseudoColor  server  for  8514/A
       graphic accelerator boards.




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       These are derived  from	the  X386  server  provided  with
       X11R5, and from the X8514 server developed by Kevin Martin
       <martin@cs.unc.edu>.

CONFIGURATIONS
       The servers support the following chipsets:

	    XF86_S3:	 86C911, 86C924, 86C801, 86C805, 86C805i,
			 86C928,    86C928-P,	86C732,	  86C764,
			 86C864, 86C964

	    XF86_Mach8:	 ATI Mach8, ATI Mach32

	    XF86_Mach32: ATI Mach32

	    XF86_Mach64: ATI Mach64

	    XF86_P9000:	 Diamond Viper VLB,  Diamond  Viper  PCI,
			 Orchid	 P9000,	 and  some clones (Weitek
			 P9000)

	    XF86_AGX:	 AGX-010,  AGX-014,   AGX-015,	 AGX-016,
			 XGA-1, XGA-2

	    XF86_W32:	 ET4000/W32, ET4000/W32i, ET3000/W32p

	    XF86_8514:	 IBM 8514/A and true clones

       For  S3 virtual resolutions up to (approximately) 1152x800
       are supported, using  (up to) 1Mb of display  memory  (the
       S3 uses an internal width of 1280 except for new revisions
       of some of the chips, hence 1Mb can't  support  1152x900).
       Physical	 resolutions  up  to 1280x1024 (1600x1280 on some
       cards) are possible using 2Mb or more  of  display  memory
       (virtual	 resolution  is dependent solely on the amount of
       memory installed, with the  maximum  virtual  width  being
       2048, and max virtual height is 4096).

       Similar	resolutions are supported on the Mach32.  For the
       Mach32, the maximum virtual width is 1536, and the maximum
       virtual height is 1280.

       For Mach8, the maximum virtual width is 1024.

       For 8514 the maximum resolution is 1024x768.

       For  the	 AGX  chips,  maximum resolution depends upon the
       chip revision and  amount  of  available	 display  memory.
       Refer to README.agx for configuration details.

       For  the	 P9000, the virtual and physical resolutions must
       be the same.  With sufficient memory,  resolutions  up  to
       1280x1024 are supported.




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OPTIONS
       In  addition to the normal server options described in the
       Xserver(1) manual page, these  servers  accept  some  more
       command line switches, as described in the XFree86(1) man-
       page.

       The Mach32, S3 and P9000 servers now support more  than	8
       bit  color.   The Mach32 supports 16 bit TrueColor and the
       S3 and P9000 servers support 16 and 32 bit TrueColor.  The
       32  bit	TrueColor  mode	 only  uses 24 bits per pixel for
       color information (giving you 16 million	 colors).   These
       modes  may be used by specifying the -bpp option as speci-
       fied in the XFree86(1) manpage.

SETUP
       XFree86 uses a configuration file  called  XF86Config  for
       its  initial  setup.   See the XF86Config(4/5) manpage for
       general details. Here  only  the	 parts	specific  to  the
       XF86_S3,	 XF86_Mach8,  XF86_Mach32,  XF86_P9000, XF86_AGX,
       XF86_W32 and XF86_8514 servers are explained.

       Entries for the Device  section	in  the	 XF86Config  file
       include:

       Chipset "name"
	       specifies  a  chipset so the correct driver can be
	       used.  Possible chipsets are:

	       XF86_S3:

		      s3_generic  (for	a  standard   IO   driven
				  server)

		      mmio_928	  (for	a memory mapped IO driven
				  server on  86C928,  86C864  and
				  86C964 boards)

	       XF86_Mach8:

		      mach8	  (to  force  the Mach8 server to
				  run on Mach32 boards)

	       XF86_Mach32:

		      mach32

	       XF86_Mach64:

		      mach64

	       XF86_P9000:

		      vipervlb (for the Diamond Viper VLB)




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		      viperpci	  (for the Diamond Viper PCI)

		      orchidp9000 (for the Orchid P9000 and  many
				  generic P9000-based boards)

	       XF86_AGX:

		      agx-016

		      agx-015

		      agx-014

		      agx-010

		      xga-2

		      xga-1	  (note:    only   the	 agx-016,
				  agx-015, and agx-014 have  been
				  tested.   Refer to the XGA sec-
				  tion	 of   README.agx   before
				  attempting  to  use  the  other
				  chipsets.  )

	       XF86_W32:

		      et4000w32

		      et4000w32i

		      et4000w32i_rev_b

		      et4000w32i_rev_c

		      et4000w32p_rev_a

		      et4000w32p_rev_b

		      et4000w32p_rev_c

		      et4000w32p_rev_d

	       XF86_8514:

		      ibm8514

       Clocks clock ...
	       For boards with non-programmable clock chips,  the
	       clocks	  can	  be	specified    here    (see
	       XF86Config(4/5)).  The P9000 server now no  longer
	       requires a Clocks line.	It will now work the same
	       way as other servers  with  a  programmable  clock
	       chip  (i.e.,  use  the  clocks as specified in the
	       Modes).	 Note,	clocks	over  110 Mhz	are   not



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	       recommended or supported by the P9000 server.

       ClockChip "clockchip-type"
	       For  boards  with programmable clock chips (except
	       with the P9000 server), the name of the clock chip
	       is  given.   Possible  values  for  the	S3 server
	       include	 "icd2061a",	"ics9161a",    "dcs2834",
	       "sc11412",    "s3gendac",   "s3_sdac",	"ti3025",
	       "ics2595",  "ics5300",  "ics5342"  and	"ch8391".
	       When  using  the	 AGX  server with an XGA-2 board,
	       specify any  one	 of  these  ClockChip  values  to
	       enable its programmable clock code.

       Ramdac "ramdac-type"
	       This  specifies	the  type  of  RAMDAC used on the
	       board.  Only the S3 and AGX servers use this.

	       normal - (S3, AGX) Card does not have one  of  the
	       other RAMDACs mentioned here.  This option is only
	       required for the S3 server if  the  server  incor-
	       rectly  detects	one  of those other RAMDACs.  The
	       AGX server does not yet auto-detect RAMDACs,  this
	       is the default if no RAMDAC is specified.

	       att20c490  -  (S3) Card has an AT&T 20C490 or AT&T
	       20C491 RAMDAC.  When the dac_8_bit option is spec-
	       ified,  these RAMDACs may be operated in 8 bit per
	       RGB mode.  It also  allows  16bpp  operation  with
	       801/805	boards.	  There	 is  currently	no  auto-
	       detection for these RAMDACs.  Note that 8 bit  per
	       RGB  mode does not appear to work with the Winbond
	       82C490 RAMDACs  (which  SuperProbe  identifies  as
	       AT&T  20C492).	16bpp works fine with the Winbond
	       82C490.

	       sc15025 - (S3, AGX) Card has a Sierra  SC15025  or
	       SC15026	RAMDAC.	  The S3 server has code to auto-
	       detect this RAMDAC.

	       bt485 - (S3) Card has a BrookTree Bt485 or  Bt9485
	       RAMDAC.	 This  must  be	 specified  if the server
	       fails to detect it.

	       att20c505 - (S3) Card has an AT&T  20C505  RAMDAC.
	       This  must be specified either if the server fails
	       to detect the 20C505, or if the card has	 a  Bt485
	       RAMDAC  and there are problems using clocks higher
	       than 67.5Mhz.

	       att20c498 - (S3) Card has an AT&T 20C498 or 21C498
	       RAMDAC.	 This  must  be	 specified  if the server
	       fails to detect it.

	       att22c498 - (S3) Card has an AT&T  22C498  RAMDAC.



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	       This  must  be  specified  if  the server fails to
	       detect it.

	       stg1700 - (S3) Card has an STG1700  RAMDAC.   This
	       must  be	 specified  if the server fails to detect
	       it.

	       s3gendac - (S3) Card  has  an  S3  86C708  GENDAC.
	       This  RAMDAC  does  not support 8 bit per RGB mode
	       (don't specify the dac_8_bit option).   It  allows
	       16bpp  operation	 with  801/805	boards.	 There is
	       currently no auto-detection for this RAMDAC.

	       s3_sdac - (S3) Card has an S3 86C716 SDAC  RAMDAC.
	       This  must  be  specified  if  the server fails to
	       detect it.

	       ics5300 - (S3) Card has an ICS5300  RAMDAC.   This
	       must be specified if the server fails to detect it
	       (the server will recognise this as  an  S3  GENDAC
	       which is OK).

	       ics5342	-  (S3) Card has an ICS5342 RAMDAC.  This
	       must be specified if the server fails to detect it
	       (the  server  will  recognise  this  as an S3 SDAC
	       which is OK).

	       ti3020 - (S3) Card has a TI ViewPoint Ti3020  RAM-
	       DAC.   This  must be specified if the server fails
	       to detect the Ti3020.  Note that pixel  multiplex-
	       ing  will  be  used  for	 this  RAMDAC if any mode
	       requires a dot clock higher than 70MHz.

	       ti3025 - (S3) Card has a TI ViewPoint Ti3025  RAM-
	       DAC.   This  must be specified if the server fails
	       to detect the Ti3025.  Note that pixel  multiplex-
	       ing  will  be  used  for	 this  RAMDAC if any mode
	       requires a dot clock higher than 70MHz.

	       bt481 - (AGX) Card has a BrookTree Bt481 RAMDAC.

	       bt482 - (AGX) Card has a BrookTree Bt482 RAMDAC.

	       herc_dual_dac - (AGX) Card (Hercules Graphite Pro)
	       has  both  the  84-pin  (Bt485  or AT&T20C505) and
	       44-pin (Bt481 or Bt482) RAMDACs installed.

	       herc_small_dac -	 (AGX)	Card  (Hercules	 Graphite
	       Pro)  has  only the 44-pin (Bt481 or Bt482) RAMDAC
	       installed.

       IOBase ioaddress
	       specified the base address for extended IO  regis-
	       ters.  This is only used by the AGX server, and by



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	       the P9000 server for the Viper PCI.   For  details
	       of   how	 to  use  it,  refer  to  README.agx  and
	       README.P9000.

       MemBase memaddress
	       specifies the hard-wired part of the linear frame-
	       buffer  base address.  This option is only used by
	       the P9000, S3, and Mach32 servers (and  only  when
	       using  a	 linear framebuffer).  For the S3 server,
	       the hard-wired part is the high	10  bits  of  the
	       32-bit  address	(ie  memaddress	 is  masked  with
	       0xFFC00000).  Note: this should	not  be	 required
	       for  the 864 and 964 chips where the entire frame-
	       buffer address is software-selectable.  Also, note
	       that the in versions prior to 3.1.1, the S3 server
	       used only the top 6 bits of memaddress,	and  ored
	       it  with 0x3C00000.  To get the same behaviour, or
	       0x3C00000 with the value	 given	previously.   For
	       the  Mach32 server, the mask is 0xF8000000 (except
	       for  PCI	 cards,	 where	the  membase  setting  is
	       ignored).

	       This  option  must  be  specified  with	the P9000
	       server.	With local bus Diamond Vipers  the  value
	       of    memaddress	  can	be   either   0x80000000,
	       0x20000000,  or	0xA0000000.    The   default   is
	       0x80000000.   Any  value should work as long as it
	       does not conflict with another device  already  at
	       that   address.	 For  the  Viper  PCI,	refer  to
	       README.P9000.  For  the	Orchid	P9000,	the  base
	       address	 may   be   0xC0000000,	  0xD0000000   or
	       0xE0000000, and must correspond	the  the  board's
	       jumper setting.

	       Note:  The  S3 server will normally probe for this
	       address automatically.  Setting this option  over-
	       rides  that  probe.   This  is not normally recom-
	       mended because the failure of the  server's  probe
	       usually	indicates  problems  in	 using the linear
	       framebuffer.

	       The Mach32 server should not require  the  use  of
	       this option under normal circumstances.

       COPBase baseaddress
	       This sets the coprocessor base address for the AGX
	       server.	Refer to README.agx for details.

       Instance instance
	       This sets the XGA  instance  number  for	 the  AGX
	       server.	Refer to README.agx for details.

       S3MClk memclk
	       This allows the video card's memory clock value to



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	       be specified.  This  is	only  used  for	 864  and
	       Trio64 cards, and the value should not normally be
	       given here for cards with an S3 Gendac or Trio64).
	       This entry doesn't change the card's memory clock,
	       but it is used to calculate the DRAM timing param-
	       eters.  For further details refer to README.S3.

       Option flags may be specified in either the Device section
       or the Display subsection of the XF86Config file.

       Option "optionstring"
	       allows the user to select certain options provided
	       by  the	drivers.  Currently the following strings
	       are recognized:

	       nomemaccess - (S3) disable direct access to  video
	       memory.	 This  option  is ignored for the 864 and
	       964 chips.

	       noaccel - (P9000) disable hardware acceleration.

	       vram_128 - (P9000) when memory probe fails, use if
	       you have 128Kx8 VRAMs

	       nolinear	 -  (S3 and Mach32) disable use of a lin-
	       ear-mapped framebuffer.

	       ti3020_curs - (S3) Enables the  Ti3020's	 internal
	       HW cursor. (Default)

	       no_ti3020_curs - (S3) Disables the Ti3020's inter-
	       nal HW cursor.

	       sw_cursor - (S3, Mach32,	 Mach64,  P9000)  Disable
	       the hardware cursor.

	       dac_8_bit  -  (S3,  Mach32,  Mach64,  AGX) Enables
	       8-bit per RGB.  Currently only supported with  the
	       Ti3020/5,   Bt485,  AT&T	 20C505,  AT&T	20C490/1,
	       Sierra SC15025/6,  AT&T	20C498	and  STG1700  (S3
	       server),	   Bt481    and	  Bt482	  (AGX	 server),
	       ATI68875/TLC34075/Bt885 (Mach32 server) RAMDACs.

	       sync_on_green - (S3, P9000) Enables generation  of
	       sync on the green signal on cards with Bt485, AT&T
	       20C505 or Ti3020/5 RAMDACs.  Note: Although  these
	       RAMDACs	support	 sync  on green, it won't work on
	       many cards because of the way they are designed.

	       power_saver - (S3) This option enables the  server
	       to  use	the power saving feature of "green" moni-
	       tors instead of blanking when the screen saver  is
	       activated.  This option is experimental.




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	       intel_gx - (Mach32) Sets the hard-wired offset for
	       the linear framebuffer correctly for the Intel  GX
	       Pro  cards.   This option is equivalent to setting
	       the membase to 0x78000000.

	       spea_mercury - (S3) Enables pixel  multiplex  sup-
	       port  for SPEA Mercury cards (928 + Bt485 RAMDAC).
	       For these cards, pixel multiplexing is required in
	       order  to  use dot clocks higher than 67.5 MHz and
	       to access more than 1MB of  video  memory.   Pixel
	       multiplexing  is currently supported only for non-
	       interlaced modes, and modes with a physical  width
	       no smaller than 1024.

	       stb_pegasus - (S3) Enables pixel multiplex support
	       for STB Pegasus cards (928 + Bt485  RAMDAC).   For
	       these  cards,  pixel  multiplexing  is required in
	       order to use  dot  clocks  higher  than	67.5 MHz.
	       Pixel multiplexing is currently supported only for
	       non-interlaced modes, and modes	with  a	 physical
	       width no smaller than 1024.

	       number_nine - (S3) Enables pixel multiplex support
	       for Number Nine GXe level 10, 11, 12 cards (928	+
	       Bt485  RAMDAC).	For these cards, pixel multiplex-
	       ing is required in order to use dot clocks  higher
	       than 85 MHz.  Pixel multiplexing is currently sup-
	       ported only for non-interlaced  modes,  and  modes
	       with  a	physical width no smaller than 800.  This
	       option is also required for some other Number Nine
	       cards (eg, GXE64 and GXE64pro).

	       elsa_w1000pro  - (S3) Enables support for the ELSA
	       Winner 1000  PRO.   This	 option	 is  not  usually
	       required because the board can be auto-detected.

	       elsa_w1000isa  - (S3) Enables support for the ELSA
	       Winner 1000  ISA.   This	 option	 is  not  usually
	       required because the board can be auto-detected.

	       elsa_w2000pro  - (S3) Enables support for the ELSA
	       Winner 2000  PRO.   This	 option	 is  not  usually
	       required because the board can be auto-detected.

	       There are also numerous tuning options for the AGX
	       server.	Refer to README.agx for details.

       Note that XFree86 has some internal capabilities to deter-
       mine  what  hardware  it	 is running on. Thus normally the
       keywords chipset, clocks, and videoram don't  have  to  be
       specified.   But	 there may be occasions when this autode-
       tection mechanism fails, (for example, too high of load on
       the  machine  when  you start the server).  For cases like
       this, one should first  run  the	 server	 on  an	 unloaded



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       machine,	 look  at  the results of the autodetection (that
       are printed out during server startup) and then explicitly
       specify these parameters in the configuration file.  It is
       recommended that all parameters, especially Clock  values,
       be specified in the XF86Config file.

FILES
       <XRoot>/bin/XF86_S3	     The  8, 16, and 24-bit color
				     X server for S3

       <XRoot>/bin/XF86_Mach8	     The 8-bit color X server for
				     Mach8

       <XRoot>/bin/XF86_Mach32	     The  8,  and  16-bit color X
				     server for Mach32

       <XRoot>/bin/XF86_Mach64	     The 8, 16, and 24-bit  color
				     X server for Mach64

       <XRoot>/bin/XF86_P9000	     The  8, 16, and 24-bit color
				     X server for the P9000

       <XRoot>/bin/XF86_AGX	     The 8-bit color X server for
				     AGX and XGA

       <XRoot>/bin/XF86_W32	     The 8-bit color X server for
				     ET4000/W32

       <XRoot>/bin/XF86_8514	     The 8-bit color X server for
				     IBM  8514	and true compati-
				     bles

       /etc/XF86Config		     Server configuration file

       <XRoot>/lib/X11/XF86Config    Server  configuration   file
				     (secondary location)

       <XRoot>/lib/X11/doc/README.agx
				     Extra  documentation for the
				     AGX server

       <XRoot>/lib/X11/doc/README.P9000
				     Extra documentation for  the
				     P9000 server

       <XRoot>/lib/X11/doc/README.S3 Extra  documentation for the
				     S3 server

       <XRoot>/lib/X11/doc/README.W32
				     Extra documentation for  the
				     W32 server

       Note:  <XRoot> refers to the root of the X11 install tree.




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SEE ALSO
       X(1),  Xserver(1),  XFree86(1),	XF86Config(4/5),  xdm(1),
       xf86config(1), xinit(1)

AUTHORS
       In addition to the authors of XFree86 the following people
       contributed major work to this server:

       Kevin Martin,	   martin@cs.unc.edu
       Jon Tombs,	   tombs@XFree86.org
       Rik Faith,	   faith@cs.unc.edu
	       Did the	overall	 work  on  the	base  accelerated
	       servers.

       David Dawes,	   dawes@XFree86.org
       Dirk Hohndel,	   hohndel@XFree86.org
       David Wexelblat,	   dwex@XFree86.org
	       Merged their work into XFree86.

       Jon Tombs,	   tombs@XFree86.org
       David Wexelblat,	   dwex@XFree86.org
       David Dawes,	   dawes@XFree86.org
       Amancio Hasty,	   hasty@netcom.com
       Robin Cutshaw,	   robin@XFree86.org
       Norbert Distler,	   Norbert.Distler@physik.tu-muenchen.de
       Leonard N. Zubkoff, lnz@dandelion.com
       Harald Koenig,	   koenig@tat.physik.uni-tuebingen.de
       Bernhard Bender,	   br@elsa.mhs.compuserve.com
       Hans Nasten,	   nasten@everyware.se
	       Development  and	 improvement  of  the S3 specific
	       code.

       Kevin Martin,	   martin@cs.unc.edu
       Rik Faith,	   faith@cs.unc.edu
       Tiago Gons,	   tiago@comosjn.hobby.nl
       Hans Nasten,	   nasten@everyware.se
       Scott Laird,	   lair@midway.uchicago.edu
	       Development  and	 improvement  of  the  Mach8  and
	       8514/A specific code.

       Kevin Martin,	   martin@cs.unc.edu
       Rik Faith,	   faith@cs.unc.edu
       Mike Bernson,	   mike@mbsun.mlb.org
       Mark Weaver,	   Mark_Weaver@brown.edu
       Craig Groeschel,	   craig@metrolink.com
	       Development and improvement of the Mach32 specific
	       code.

       Kevin Martin,	   martin@cs.unc.edu
	       Development of the Mach64 specific code.

       Erik Nygren,	   nygren@mit.edu
       Harry Langenbacher, harry@brain.jpl.nasa.gov
       Chris Mason,	   mason@mail.csh.rit.edu



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XF86_Accel(1)					    XF86_Accel(1)


	       Development and improvement of the P9000	 specific
	       code.

       Henry Worth,	   henry.worth@amail.amdahl.com
	       Development of the AGX specific code.

       Glenn Lai,	   glenn@cs.utexas.edu
	       Development of the ET4000/W32 specific code.

       See also the XFree86(1) manual page.

BUGS
       Some  S3 cards with Bt485 ramdacs are currently restricted
       to dot-clocks less than 85MHz.

       The P9000 server may still have problems with cards  other
       than  the  Diamond Viper VLB.  There may still be problems
       with VGA mode restoration, but these should  almost  never
       occur.  Using physical resolutions different from the vir-
       tual resolution is not supported and is not possible  with
       the  P9000.  Use at dot-clocks greater than 110 MHz is not
       recommended and not supported.  Diamond	claims	that  135
       MHz  is the maximum clock speed, but some of their bt485's
       are not rated that high.	 If you do not	have  a	 135  MHz
       bt485 on your Viper, contact Diamond tech support and they
       will send you an RMA number to replace the board.   Accel-
       eration	is  being  added in slowly.  At the present, only
       CopyArea and  MoveWindow	 and  DrawLine	are  implemented.
       Other  accelerated  features  are  being tested and may be
       available in the next release.  There seems to be a  prob-
       lem  with  olvwm when used with xdm and VT switching.  The
       cursor will be messed up when you return to a  VT  if  the
       cursor changed while you were in the VT.

CONTACT INFO
       XFree86	 source	  is   available   from	 the  FTP  server
       ftp.XFree86.Org	  and	 mirrors.     Send    email    to
       XFree86@XFree86.Org for details.



















XFree86			  Version 3.1.1			       12


