  ͻ
                                                                           
                 ISA Bus: Above Board Technical Information                
                                                                           
  ͼ

PARALLEL PORT

  PARALLEL PORTS
  DOS assigns the names LPT1, LPT2, and LPT3 to parallel ports according to
  the number of parallel ports in the computer and the I/O address each
  uses.  You can have up to three parallel ports in your computer only if
  LPT1 is on the IBM Monochrome display Adapter or its equivalent.
  Otherwise DOS limits your computer to two parallel ports (LPT1 and LPT2).
  When you turn on or restart your computer, DOS checks for parallel ports
  first at I/O address 3BC, then at 378, and finally at 278.  The first port
  it finds becomes LPT1, the second LPT2, and the third LPT3.  The SETBOARD
  program lets you name the Above Board's port.

  You can't set the Above Board port to I/O address 3BC.  This address is
  reserved for video boards that contain a parallel port.

  If you have only one parallel port in the computer, DOS always names it
  LPT1, regardless of the I/O address it uses.  If you have two parallel
  ports, DOS assigns LPT1 to the port using the highest address.

SERIAL PORT GENERAL NOTES

  The AB uses the standard IBM AT 9-pin serial connector. Other 9-pin
  connectors will not work.

  Our serial port will not work in the current loop mode.

  DOS Versions through 3.2 support COM1 and COM2 only.  DOS 3.3 supports
  COM3 and COM4 only on machines whose BIOS can detect the 3rd and 4th
  serial ports. (So far, only IBM PS-2 Models 50, 60 & 80 can do this).

  Should set COM1 at 3F8 and COM2 at 2F8 unless customer has special
  communications software that can recognize serial ports at 3E8 and 2E8.

  The AB serial port uses the Intel 82510 chip. The IBM Advanced diagnostics
  is looking for an older serial port chip so the AB Serial Port will fail
  the IBM Advanced Diagnostics. The only way to test the port is to use a
  serial device such as a mouse or modem on it.

SERIAL PORT & INTERRUPTS

  Ŀ
     Above Board               Interrupts        
     Serial Port                                 
  ͵
     COM 1 (3F8)            IRQ 4                
     COM 2 (2F8)            IRQ 3                
     COM 3 (3E8)            IRQ 2 or IRQ 5       
     COM 4 (2E8)            IRQ 5 or IRQ 2       
  

  In Classic bus computers, there is no set convention for choosing the
  interrupt for COM3 and COM4.

ACCESS TIMES FOR THE AB 286, AB PLUS, & PLUS 8

  8088- and 8086-based computers
  Ŀ
     Frequency      Bus Clock       Memory           I/O       
                     Period       Cycle time      Cycle Time   
  Ĵ
      4.77 MHz       210 ns         840 ns          1050 ns    
                                                               
      8.0  MHz       125 ns         500 ns           625 ns    
                                                               
     10.0  MHz       100 ns         400 ns           500 ns    
  

  80286- and 80386-based computers
  Ŀ
    Memory Range 6 MHz  8 Mhz      10 Mhz      12.5 Mhz
     accessed                  120ns   150ns           
  ͵
   Conventional                                       
   and Extended                                       
      16 => 16   501ns  375ns  300ns  400ns    334ns  
                  1ws    1ws    1ws    2ws      2ws   
  ͵
   Expanded                                           
      8  =>  8    N/A    N/A   600ns  600ns    501ns  
                                4ws    4ws      4ws   
  Ĵ
      16 =>  8    N/A    N/A  1200ns 1200ns   1002ns  
                                10ws   10ws     10ws  
  Ĵ
      16 => 16   501ns  375ns   N/A     N/A      N/A  
                         1ws                          
  

  ws = wait states
   8 => 8   8-bit bus operations to 8-bit devices. This takes sixty
       clock cycles, including four wait states (generated by the system
       board).

  16 => 8        16-bit bus operations to 8-bit devices. Takes 12 clock
       cycles, including 10 wait states (generated by the system board).

  16 => 16       16-bit bus operations to 16-bit devices. Takes three
       clock cycles including one wait state (generated by the system
       board).

BYTE SWAPPING, MEMCS16, & AB 286

  The Above Board 286, Plus, and Plus 8 work in computers with bus speeds of
  6, 8, 10, and 12.5 MHz.  Use the SETBOARD program to configure the Above
  Board for the proper speed.  For the Above Board to work correctly, the
  computer must add at least one wait state to every memory access on the
  bus.

  Many computers eliminate wait states for accesses to system board memory,
  but these computers still add a wait state to access non-system board
  memory.  IBM AT computers require this.  Computers which do not add the
  wait state are not fully IBM AT compatible.  Here's how the Above Board
  handles wait states for the different bus speeds:

  6 and 8 MHz:
       MemCS16- works normally, (open-collector), 120ns for extended and
       conventional memory.  In the C0000 and 150ns RAM D0000 segments,
       (expanded memory range), MemCS16- is actively driven hi or lo.  It
       is driven hi if the bus address is not within the 64Kb page frame
       and it is driven lo if the address is within the page frame. The
       result of this is that the Above Board  can be the ONLY 16-bit
       board in the C0000 thru D0000 segments, (UNLESS the 16BIT=xx
       parameter is included on the EMM.SYS device driver line).  All
       other 8-bit boards will work correctly.

  10 MHz, 120ns RAM:
       MemCS16- works normally (open-collector) for extended and
       conventional memory.  In the C0000 and D0000 segments MemCS16- is
       left in the high-impedance state.  This forces the motherboard to
       break 16-bit accesses into two 8-bit accesses, (each 8-bit access
       contains four wait states as the motherboard default), and the
       board reconstructs the data.  We call this type of operation a
       byte-swap.  No extra Wait states are added by the Above Board.

  10 MHz, 150ns RAM:
       Same as above except that an extra wait state is added for all
       extended and conventional memory accesses.  If the system is IBM
       compatible, the motherboard always inserts one wait state, so our
       extra wait state is actually the second.  If people have "Zero-
       Wait State" machines, determine if the bus has the required wait
       state or if the bus is actually zero wait states.  Our  board
       requires at least one from the bus.  No MemCS16- remains in high
       impedance state in the C0000 and D0000 segments.

  12.5 MHz, both RAM speeds:
       An extra wait state is added for all extended and conventional
       memory accesses.  Expanded memory is byte-swapped as described
       above.  No MemCS16- remains in high impedance state in the C0000
       and D0000 segments.

  NOTE:  PC/XT systems do not use MemCS16 and therefore the Above Board
            286 will keep the MemCS16 signal in high impedance for all
            above system types where applicable, (4.77 or 8MHz).

EEPROM - HOW MANY TIMES CAN IT BE PROGRAMMED?

  The EEPROM on the Above Board is specified for 10,000 erase/write cycles
  per
  register.



End of file                 Intel FaxBack # 1010          December 2,1992
