*******************************************************************************
****		Fast Rom V1.54 - (c) 1992-1993 Joe Tapply                  ****
*******************************************************************************
****    With any luck this program should move the 68030's address         **** 	
****    translation tables to somewhere safer then the bottom of ST RAM.   ****
****    This version also gives you the option to move the TT's ROMS       ****
****          into TT RAM ,thus speeding your TT up a little!		   ****	
****    If your TT doesn't have any TT RAM,then this program might not     ****
****      work properly(as there in nowhere 'ST proof' to put the MMU-     **** 
****     tables),but here's hoping anyway!                                 ****
*******************************************************************************
****	     USE THIS PROGRAM AT YOUR OWN RISK!I WILL NOT ACCEPT ANY       **** 
****    RESPONSIBILITY FOR ANY DAMAGE OR INJURY(!) RESULTING FROM THE      ****
****                USE OR MISUSE OF THIS CODE.                            ****
*******************************************************************************

*Tuesday 2nd March 1993:This is a new version of this program designed to
*work on TT's other than mine!Hopefully this might be useful for TT users
*who don't posess any TT RAM,but I can't be sure.If you have any problems
*with this code,then e-mail me (jdmt@dcs.ed.ac.uk),I MIGHT be able to help!

*Friday 5th March - this has taken me a little longer then I had expected,
*but I now believe the TT RAM version  now works with/without ROM and/or
*24 bit modes!Just a few more tests to do and I'll start mailing it off! 

*I have briefly tested all 5 versions of this and they _seem_ to work.
*This program seems to work with MiNT 0.99 with the memory protection
*OFF,however the ST RAM version only works with MiNT if you run it 
*before MiNT (in the auto folder).

*The TT RAM versions should be run from the AUTO folder,or from MiNT.cnf
*but they can be run from the desktop.

*Hope it works for you too,Have fun! 

*Cheers,Joe Tapply (jdmt@dcs.ed.ac.uk).

*This program was written in Devpac3/TT.



*Set this flag to 1 if you want your '030 to act like a 68000,and only
*use 24 bit addresses-apart from the 1st 32MB of TT RAM.If you have more
*than 32MB of TT RAM you will have to modify the source slightly,but
*this is easy and is explained further down.I just had a nasty thought that
*24 bit addressing might kill off all VME cards e.g. Crazy Dots,but as
*I don't have any VME cards or the address of the VME slot I can neither
*test or fix this.If you have any strange results,then just turn 24bit mode
* off - you probably can live without it anyway.

only_24_bit_addresses	equ	0	1=24 bit mode,0=normal 32 bit mode

*This flag allows you to move the ROMS to TT RAM!You can't move the roms
*if don't have any TT RAM,because this would be silly and would slow down
* your TT! 

roms_to_ram	equ	1	1=move ROMS,0=don't

*This flag is for people who have no TT RAM :-(
*(get some,you'll be glad you did!).If you set this flag this program will 
* TRY to move the MMU translation tables to just below phystop.
*I can't guarantee that this will work,but there is a small chance that it 
*might! (Seems to :-) Joe)


I_have_no_TT_RAM_help_me equ 0     1=try to move MMU tables to ST RAM 

		comment	HEAD=$7    Tell Devpac to load this into TT RAM


m_shrink	equ	$4a
super		equ	$20
m_xalloc	equ	$48
phystop		equ	$42e
p_termres	equ	$31
c_conws		equ	$9
p_term		equ	$4c
_memtop		equ	$436
start
	
	move.l	4(a7),a3
	move.l	$c(a3),d0
	add.l	$14(a3),d0
	add.l	$1c(a3),d0
	add.l	#2000,d0
	add.l	#$100,d0

	lea	long_to_keep(pc),a0
	move.l	d0,(a0)
	
	lea	my_stack,sp
	move.l	d0,-(sp)
	move.l	a3,-(sp)
	clr.w	-(sp)
	move.w	#m_shrink,-(sp)
	trap	#1
	lea	12(sp),sp

	clr.l	-(sp)
	move.w	#super,-(sp)		Let's go to supervisor mode
	trap	#1
	addq.l	#6,sp
	lea	old_ssp(pc),a0
	move.l	d0,(a0)

	IFEQ	I_have_no_TT_RAM_help_me

	move.w	#1,-(sp)		TT RAM ONLY please
	
		IFNE	roms_to_ram
	
		move.l	#550*1024,-(sp)		550 KB please
	
		ELSEIF
	
		move.l	#2*1024,-(sp)		2KB please
	
		ENDC
	
	move.w	#m_xalloc,-(sp)
	trap	#1
	addq.l	#8,sp
	
	tst.l	d0
	beq	not_enough_ram

		IFEQ	roms_to_ram
		add.l	#16,d0
		and.l	#$fffffff0,d0	
*MMU tables MUST start on a 16 byte boundary!
		
		ENDC	
	
	ELSEIF

	move.l	phystop,a0	Find the top of ST RAM
	lea	-2560(a0),a1	and use that 2.5KB as our 'safe' space
	move.l	a1,phystop	Tell GEM NOT to use that memory
	sub.l	#2560,_memtop	Lower GEM's user-memory-top.
	lea	512(a0),a0	This is where we'll put our MMU tables

*Remember that boot_it will use the 512 bytes directly under phystop
*when running in ST RAM.Therefore the MMU tables can't be longer than
*1.5KB.In this case they are only 256 bytes long,so it should work!
	
	sub.l	#153600,a1	TT screens are this big
	
	movem.l	a0-a3/d0-d3,-(sp)	save registers before syscall
	
	move.w	#-1,-(sp)	stay in current resloution
	move.l	a1,-(sp)	move physbase to here
	move.l	a1,-(sp)	move logbase to here
	move.w	#5,-(sp)	Xbios Setscreen
	trap	#14
	lea	12(sp),sp
	
	movem.l	(sp)+,a0-a3/d0-d3	and restore our registers	
				
	move.l	a0,d0
	
	ENDC	
	
	lea	memory_start(pc),a0
	move.l	d0,(a0)
	
	
	pea	shadowing_text
	move.w	#c_conws,-(sp)
	trap	#1
	addq.l	#6,sp

	IFNE	roms_to_ram

	move.l	memory_start(pc),d0
	add.l	#32*1024,d0
	and.l	#$ffff8000,d0
	move.l	d0,d7
	move.l	d0,d6			d6=rom start
	sub.l	memory_start(pc),d7	should MMU table go before  ROMs ?
	
	move.l	d0,a1		this it the rom dest

	lea	$00e00000,a0
	move.w	#$80000/4/4-1,d0
move_rom_loop	
	move.l	(a0)+,(a1)+
	move.l	(a0)+,(a1)+
	move.l	(a0)+,(a1)+
	move.l	(a0)+,(a1)+
	dbra	d0,move_rom_loop	

	cmp.l	#$800,d7
	ble.s	root_after_roms
	lea	my_crp+4(pc),a0
	
	move.l	d6,a1		get rom base address
	lea	-$300(a1),a1	make space for table
	bra.s	root_address_decided
root_after_roms
	
	move.l	d6,a1
	add.l	#512*1024,a1
	lea	$100(a1),a1
	
	
	
root_address_decided
	
	move.l	a1,d0

	ELSEIF

	move.l	memory_start(pc),a1
	move.l	a1,d0

	ENDC
	
	lea	my_crp+4(pc),a0
	move.l	d0,(a0)
	
	lea	b_pagef_ptr(pc),a0
	add.l	d0,(a0)
	lea	c_pagef_ptr(pc),a0
	add.l	d0,(a0)
	lea	b_page0_ptr(pc),a0
	add.l	d0,(a0)
	lea	c_page0_ptr(pc),a0
	add.l	d0,(a0)
	
	
	
	lea	rom_ptr(pc),a0
	IFNE	roms_to_ram
	
	add.l	d6,(a0)
	
	ELSEIF
	
	add.l	#$00e00000,(a0)
	
	ENDC
		
	lea	level_a(pc),a0
	move.w	#(end_of_tables-level_a)/4-1,d0
move_tables_loop
	move.l	(a0)+,(a1)+
	dbra	d0,move_tables_loop
	
	pmove.l	my_tc,tc
	
	pmove.d	my_crp,crp	
	
	pmove.l	my_tt0,tt0
	pmove.l	my_tt1,tt1
	
	
	pflusha	
	
	move.l	old_ssp(pc),-(sp)
	move.w	#super,-(sp)		back to user mode.
	trap	#1
	addq.l	#6,sp
	
	clr.w	-(sp)
	move.l	long_to_keep(pc),-(sp)	
	move.w	#p_termres,-(sp)	This is a TSR!
	trap	#1
	
not_enough_ram
	pea	no_ram_text
	move.w	#c_conws,-(sp)
	trap	#1
	addq.l	#6,sp

	move.w	#5000,d0
no_ram_loop1
	move.w	#2000,d1
no_ram_loop2
	dbra	d1,no_ram_loop2
	dbra	d0,no_ram_loop1
	
	
	clr.w	-(sp)
	move.w	#p_term,-(sp)
	trap	#1

memory_start
	dc.l	0

	
no_ram_text
	dc.b	"Fast Rom V1.54 ½1992-1993 Joe Tapply",$a,$d
	dc.b	"Sorry,there is not enough  free TT RAM to shadow the Roms!",$a,$d,0
	even 

long_to_keep
	dc.l	0

my_crp
		dc.l	$80000002	Set no limits and short descriptors.
root_ptr	dc.l	$00000000	Pointer to tree root goes here

my_tc
	dc.l	$80f04445
*This means:
*Enable translation,disable SRP and Function Code lookup,
*the page size is 32K bytes,there are 4 index bits for level A,
*4 for level B,4 for level C and 5 for level D.

my_tt0
	dc.b	$01	Make $01xxxxxx transparent
	dc.b	$00	Make only 16MB transparent	
	dc.b	$81	Enable,for reads and writes
	dc.b	$07	Ignore function codes
my_tt1
	dc.l	0	no transparent stuff
	


my_table
		IFEQ	only_24_bit_addresses
		
level_a
b_page0_ptr	dc.l	b_page0_tab-level_a+$2	Pointer to page 0x tables.		
	
	dc.l	$10000001	Terminate translation for this page.
	dc.l	$20000001	Terminate translation for this page.
	dc.l	$30000001	Terminate translation for this page.
	dc.l	$40000001	Terminate translation for this page.
	dc.l	$50000001	Terminate translation for this page.
	dc.l	$60000001	Terminate translation for this page.
	dc.l	$70000001	Terminate translation for this page.
	dc.l	$80000001	Terminate translation for this page.
	dc.l	$90000001	Terminate translation for this page.
	dc.l	$a0000001	Terminate translation for this page.
	dc.l	$b0000001	Terminate translation for this page.
	dc.l	$c0000001	Terminate translation for this page.
	dc.l	$d0000001	Terminate translation for this page.
	dc.l	$e0000001	Terminate translation for this page.
b_pagef_ptr	dc.l	b_pagef_tab-level_a+2	Pointer to page fx tables.
	
b_pagef_tab
	dc.l	$f0000001	Terminate translation for this page.
	dc.l	$f1000001	Terminate translation for this page.
	dc.l	$f2000001	Terminate translation for this page.
	dc.l	$f3000001	Terminate translation for this page.
	dc.l	$f4000001	Terminate translation for this page.
	dc.l	$f5000001	Terminate translation for this page.
	dc.l	$f6000001	Terminate translation for this page.
	dc.l	$f7000001	Terminate translation for this page.
	dc.l	$f8000001	Terminate translation for this page.
	dc.l	$f9000001	Terminate translation for this page.
	dc.l	$fa000001	Terminate translation for this page.
	dc.l	$fb000001	Terminate translation for this page.
	dc.l	$fc000001	Terminate translation for this page.
	dc.l	$fd000001	Terminate translation for this page.
	dc.l	$fe000001	Terminate translation for this page.
c_pagef_ptr	dc.l	c_page0_tab-level_a+2	Pointer to page 00x tables.


b_page0_tab
c_page0_ptr	dc.l	c_page0_tab-level_a+2	Pointer to page 00x tables.
	dc.l	$01000001	Terminate translation for this page.	
	dc.l	$02000001	Terminate translation for this page.	
	dc.l	$03000001	Terminate translation for this page.	
	dc.l	$04000001	Terminate translation for this page.	
	dc.l	$05000001	Terminate translation for this page.	
	dc.l	$06000001	Terminate translation for this page.	
	dc.l	$07000001	Terminate translation for this page.	
	dc.l	$08000001	Terminate translation for this page.	
	dc.l	$09000001	Terminate translation for this page.	
	dc.l	$0a000001	Terminate translation for this page.	
	dc.l	$0b000001	Terminate translation for this page.	
	dc.l	$0c000001	Terminate translation for this page.	
	dc.l	$0d000001	Terminate translation for this page.	
	dc.l	$0e000001	Terminate translation for this page.	
	dc.l	$0f000001	Terminate translation for this page.	

c_page0_tab
	dc.l	$00000001	Terminate
	dc.l	$00100001	Terminate
	dc.l	$00200001	Terminate
	dc.l	$00300001	Terminate
	dc.l	$00400001	Terminate
	dc.l	$00500001	Terminate
	dc.l	$00600001	Terminate
	dc.l	$00700001	Terminate
	dc.l	$00800001	Terminate
	dc.l	$00900001	Terminate
	dc.l	$00a00001	Terminate
	dc.l	$00b00001	Terminate
	dc.l	$00c00001	Terminate
	dc.l	$00d00001	Terminate
rom_ptr	dc.l	$00000001	Terminate
	dc.l	$00f00041	Terminate,Cache inhibit

	
		ELSEIF	
level_a
b_page0_ptr	dc.l	b_page0_tab-level_a+$2	Pointer to page $x tables.		
	dc.l	$00000001	Remap $1xxxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $2xxxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $3xxxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $4xxxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $5xxxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $6xxxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $7xxxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $8xxxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $9xxxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $axxxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $bxxxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $cxxxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $dxxxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $exxxxxxx to $00xxxxxx and terminate
b_pagef_ptr	dc.l	b_pagef_tab-level_a+2	Pointer to page fx tables.
	
b_pagef_tab
	dc.l	$00000001	Terminate translation for this page.
	dc.l	$00000001	Terminate translation for this page.
	dc.l	$00000001	Terminate translation for this page.
	dc.l	$00000001	Terminate translation for this page.
	dc.l	$00000001	Terminate translation for this page.
	dc.l	$00000001	Terminate translation for this page.
	dc.l	$00000001	Terminate translation for this page.
	dc.l	$00000001	Terminate translation for this page.
	dc.l	$00000001	Terminate translation for this page.
	dc.l	$00000001	Terminate translation for this page.
	dc.l	$00000001	Terminate translation for this page.
	dc.l	$00000001	Terminate translation for this page.
	dc.l	$00000001	Terminate translation for this page.
	dc.l	$00000001	Terminate translation for this page.
	dc.l	$00000001	Terminate translation for this page.
c_pagef_ptr	dc.l	c_page0_tab-level_a+2	Pointer to page 00x tables.


b_page0_tab
c_page0_ptr	dc.l	c_page0_tab-level_a+2	Pointer to page 0x tables.
	dc.l	$01000001	Terminate translation for this page.	
	dc.l	$02000001	Terminate translation for this page.	

*If you have more than 32MB of TT RAM,then change one of the following
*table entries so that it becomes 'dc.l $0x000001' where x is the page
*number of the 16MB page that the ram occupies.For example if you had 64MB
*you would also have to change the $03xxxxxx and $04xxxxxx table entries
*to be $03000001 and $04000001 respectively.
   
	dc.l	$00000001	Remap $03xxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $04xxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $05xxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $06xxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $07xxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $08xxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $09xxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $0axxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $0bxxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $0cxxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $0dxxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $0exxxxxx to $00xxxxxx and terminate
	dc.l	$00000001	Remap $0fxxxxxx to $00xxxxxx and terminate
		

c_page0_tab
	dc.l	$00000001	Terminate
	dc.l	$00100001	Terminate
	dc.l	$00200001	Terminate
	dc.l	$00300001	Terminate
	dc.l	$00400001	Terminate
	dc.l	$00500001	Terminate
	dc.l	$00600001	Terminate
	dc.l	$00700001	Terminate
	dc.l	$00800001	Terminate
	dc.l	$00900001	Terminate
	dc.l	$00a00001	Terminate
	dc.l	$00b00001	Terminate
	dc.l	$00c00001	Terminate
	dc.l	$00d00001	Terminate
rom_ptr	dc.l	$00000001	Terminate
	dc.l	$00f00041	Terminate,Cache inhibit

	ENDC

end_of_tables

old_ssp
	dc.l	0

shadowing_text
	dc.b	$a,$d,"Fast Rom V1.54 ½1992-1993 Joe Tapply",$a,$d
	dc.b	"Moving the MMU's Memory Translation Tables!",$a,$d

	IFNE	roms_to_ram
	
	dc.b	" Shadowing roms in TT RAM ...",$a,$d
	
	ENDC
	
	IFEQ	I_have_no_TT_RAM_help_me
	
	dc.b	" 16MB of TT RAM set for transparent translation!",$a,$d
	
	ENDC
	
	IFNE	only_24_bit_addresses
	
	dc.b	" 68000 24-bit addressing now fully supported ! ",$a,$d,0

	ELSEIF

	dc.b	0,0
	
	ENDC
	
	even 
	
	section 	bss
	ds.l	1024
my_stack
	ds.w	1	