   ATI Technologies Super VGA Chip Sets.

    Board           18810 Dot    ROM BIOS
    Version   Chip  Clock Chip   Label
      V3   18800      no          V3M
      V4   18800-1    no          V4M     
      V5   18800-1    yes         V5M   
      V6   28800-2                        VGA Wonder+
      V7   28800-4                        VGA Wonder XL
	   28800-5                        VGA Graphics/Ultra
       ?   38800-1                        8514/Ultra and Graphics/Ultra
					     (8514/A chip)


    ATI Prism Elite uses Trident 8800CS chips.

    ATI VGA Wonder XL can use the Sierra HiColor RAMDAC.


       3C0h (R/W):  Palette index register
       bit 4-5  Mode 67h Palette
		 Value   Pixel=0    1      2            3
		   0       Black  White  Grey      Bright White
		   1       Black  Green  Red       Yellow
		   2       Black  Cyan   Red       White
		   3       Black  Cyan   Magenta   White


       1CEh index B0h (R/W): ATI Register 0
	 bit 0  Reserved
	     3  Enable 8 CRT accesses for each CPU access
	     4  (V6)  Video memory: 0=256k, 1=512k
	   3-4  (V7)  Video memory: 0=256k, 1=1M, 2=512K, 3=1M?
	     6  (V3)  Bit 16 of the Display Start Address
		      or Hercules 300 line emulation  ???
	   6-7  (V4-V7)  Bit 16-17 of the Display Start Address
       1,2,4,5  DRAM timing

       1CEh index B1h (R/W): EGA Compatibility and Double Scanning Enable
	 bit 0  Force all I/O addresses to be EGA compatible if set
	     1  Force all registers to be EGA compatible if set
	     2  General purpose read/write
	   3-5  Double scanning/3 of 4 scanning enable
		 1: Enable double scanning in graphics mode
		 2: Enable 3 of 4 scanning in graphics mode
		 5: Enable double scanning in text mode
		 6: Enable 3 of 4 scanning in text mode
	     6  Divide vertical timing parameters by 2 if set
	     7  Reserved

       1CEh index B2h (R/W): Bank Register
	 bit 0  (V3) Enable interlace if set
	   1-4  (V3) Bank no. in 64 chunks
	     5  (V3) Enable internal DIP switch settings (EGA mode)
	     6  (V3) External clock select
	     7  (V3) Reserved

	     0  (V4-V6) Reserved
	   1-3  (V4-V6) Write/Single bank no
	     4  (V4-V6) Reserved
	   5-7  (V4-V6) Read Bank no

	     0  (V7)  Bit 3 of Read bank no
	   1-4  (V7)  Write/Single Bank no.
	   5-7  (V7)  Bit 0-2 of Read bank no. 

       1CEh index B3h (R/W): ATI Register 3
	 bit 0  EEPROM data input
	     1  EEPROM clock source
	     2  Enable EEPROM interface
	     3  EEPROM chip select
	     4  (V3-V5)  Enable PS/2 decoding
		(V6..) Disable memory beyond 256K
	     5  Enable 16bit operation
	     6  (V6..)  Enable 1024x768 16 color planar pixel mode
	     7  (V6..)  Enable double scanning for 200 line modes
       Note: This register should not be modified on revision 1 chips.

       1CEh index B4h (R/W): ATI Register 4
	 bit 0  Enable CGA emulation
	     1  Enable Hercules emulation
	     2  Lock CR90-94,CR97
	     3  Lock vertical timing registers
	     4  Lock cursor start and end
	     5  Lock CR80-86 and CR140-144
	     6  Lock CR0-7 instead of CR117
	     7  Override locking of CR117

       1CEh index B5h (R/W): ATI Register 5
	 bit 0  Select display enable as blanking signal
	     1  Invert blanking signal polarity
	     2  Enable display signal skew
	     3  Select Map 3 as programmable character generator
	     4  Enable 8 simultaneous fonts if set
		Background is then always 0, and bit 4-7 of an attribute
		selects the font.
	     5  Disable Cursor Blinking if set
	     6  Enable CGA Cursor Emulation if set
		Adds 5 to the cursor start and end registers.
	     7  Reserved

       1CEh index B6h (R/W): ATI Register 6
	 bit 0  Reserved
	     1  Enable 640x400 Hercules emulation
	     2  Reserved
	     3  Select 4 color high res modes
	     4  Select 16 color high res modes
	     5  Enable vertical interrupts
	     6  Select composite sync for output
	     7  Disable blanking screen blank in CGA and Hercules
		emulation

       1CEh index B7h (R/W): ATI Register 7
       bit 0-7  Reserved

       1CEh index B8h (R/W): ATI Register 8
	 bit 0  Lock Palette registers in Attribute Controller
	     1  Lock Overscan register in Attribute Controller
	     2  Lock All VGA registers except CRTC start and end
	     3  Lock write to 3C2h
	     4  Lock horizontal sync polarity
	     5  Lock vertical sync polarity
	   6-7  Clock divider

       1CEh index B9h (R/W): ATI Register 9
	 bit 0  Clock select
	     1  Select input to clock chip
	   2-3  RAM address space
	   4-5  Wait cycles for 16 bit ROM access
	     6  Set horizontal total = register value +2 (vs +5)
	     7  Lock Line Compare register

       1CEh index BAh (R/W): ATI Register A
       bit 0-2  Delay chain timing compensation
	     3  Disable secondary Red output (for RGB monitors)
	     4  Enable EGA color simulation for RGB monitors
	     5  Enable monochrome gray scale circuit
	     6  reserved
	     7  Delay chain resolution compensation

       1CEh index BBh (R/W): Input Status Register
       bit 0-3  Monitor Type:
		 0: EGA
		 1: PS/2 Analog Monochrome
		 2: TTL Monochrome
		 3: PS/2 Color
		 4: RGB Color
		 5: MultiSync
		 7: PS/2 8514
		 8: Seiko 1430
		 9: NEC Multisync 2A
		 A: Crystalscan 860/Tatung 1439
		 B: NEC Multisync 3D
		 C: TVM 3M
		 D: NEC MultiSync XL
		 E: TVM 2A
		 F: TVM 3A
	     4  reserved
	     5  (V3-V5) 512Kbytes if set, 256K else
	   6-7  Reserved

       1CEh index BCh (R/W): ATI Register C
       bit 0-7  reserved

       1CEh index BDh (R/W): ATI Register D
       bit 0-3  Reserved
	   4-7  EGA switch settings

       1CEh index BEh (R/W): ATI Register E        (rev 2+)
	 bit 0  Unlock Vertical Display End register of the
		CRT Controller
	     1  Enable interlace mode
	     2  Select internal EGA DIP switch value
	     3  Dual bank mode if set, single else
	   4-5  Reserved
	     6  Enable 1024x768 16 color mode
	     7  Enable 1024x768 4 color mode


       3C0h (R/W):  Palette index register
       bit 4-5  Mode 67h Palette
		 Value   Pixel=0    1      2            3
		   0       Black  White  Grey      Bright White
		   1       Black  Green  Red       Yellow
		   2       Black  Cyan   Red       White
		   3       Black  Cyan   Magenta   White

  Note:  The ATI chips handles the indexed registers slightly differently
	 from other VGA chips, as the index register must be written before
	 each read or write of the associated data register.



  Bank Switching

    Bank switching can use either one single bank register or two
    separate read and write bank registers (18800-2 and 28800 Only).
    Banks map to 64k boundaries.

  Reserved locations:

    $C000:$10   2 bytes   ATI Register (usually $1CE).
    $C000:$31   9 bytes   '761295520' ID's ATI product
    $C000:$40   2 bytes   '31' ID's ATI Super VGA
			  '32' = ATI EGA Wonder 800+
			  '22' = ATI EGA Wonder
    $C000:$42   1 byte    Bit 0  Set for 16-bit boards
			      1  Mouseport present if set
			      2  Non-interlace if set
			      3  Microchannel if set, PC/AT else
			      4  Use clock chip if set
			      7  Use C000:0000 to D000:FFFF with 16 bit ROM if set
    $C000:$43   1 byte    Gate revision. 
			     '1' = 18800   (Version 1),
			     '2' = 18800-1 (Version 2),
			     '3' = 28800-2 (Version 2 with VRAM).
			     '4' = 28800-4  VGA Wonder+
			     '5' = 28800-5  VGA Wonder XL
			     '6' = ???  
    $C000:$44   1 byte    Bit 0  If clear the board can support 70Hz 
				 non-interlaced refresh 
			      1  If set the board supports Korean characters
				 in VGA mode 
			      2  If set the board uses 45MHz memory clock
			      3  If set the board supports zero wait states.
			      4  If set the board uses paged ROMs.
			      6  If clear there is 8514/A hardware on board
				 (Graphics Ultra)
			      7  If set there is a 32K color DAC on board. 
    $C000:$4C   1 byte    Major Bios version
    $C000:$4D   1 byte    Minor Bios version




  ID ATI Super VGA Chip Set

    if (getbios($31,9)='761295520') and (getbios($40,2)='31') then
    begin
       {ATI_Super_VGA}
      case mem[$c000:$43] of
	$31: ATI 18800;
	$32: ATI 18800-1;
	$33: ATI 28800-2;
	$34: ATI 28800-4;
	$35: ATI 28800-5;
      else unknown_ATI
      end
    end;
 


  Video Modes:
    23h  T   132   25  16  (8x14)
    27h  T   132   25   2  (8x14)
    33h  T   132   44  16  (8x8)
    37h  T   132   44   2  (8x8)
    53h  G   800  560  16  planar
    54h  G   800  600  16  planar
    55h  G  1024  768  16  planar   (V4 or later)
    58h  T    80   33      (8x8)
    5Bh  T    80   30      (8x16)
    61h  G   640  400 256  packed
    62h  G   640  480 256  packed
    63h  G   800  600 256  packed
    64h  G  1024  768 256  packed   V6 (VGA Wonder +) or later
    65h  G  1024  768  16  packed   ****  See note
    67h  G  1024  768   4  planar   ****  See note
    6Ah  G   800  600  16           Undocumented ??
    72h  G   640  480 32k  Sierra 15-bit    V7 (XL) only
    73h  G   800  600 32k  Sierra 15-bit    V7 (XL) only


    ATI enhanced Graphics modes do NOT support INT 10h with AH=
      01h..0Eh or 11h or 13h.


    Mode 65h  1024x768 16 color
      4 bits per pixel packed mode
      Even pixel is in bits 0-3 of the byte, odd in bits 4-7.

    Mode 67h  1024x768  4 color
      2 bits per pixel planar mode
      Even pixels are in plane 2&3, odd pixels in plane 0&1.


  Bios extensions:

----------1012--BH55-------------------------
INT 10 - VIDEO - ALTERNATE FUNC SELECT (ATI,Tatung,Taxan) - ENHANCED FEATURES
	AH = 12h
	BH = 55h
	BL = subfunction
	      00h disabled enhanced features
	      01h enable enhanced features
	      02h get status
Return:           AL = status flags
		       bit    3  set if enhanced features enabled
		       bits 7-5  monitor type
				 000 PS/2 mono
				 001 PS/2 color
				 010 multi-sync
				 011 Taxan 650 25kHz
				 100 RGB
				 101 mono
				 110 EGA
				 111 Compaq internal
	      03h disable register trapping (CGA emulation)
	      04h enable register trapping
	      05h program mode described by table at ES:BP
	      06h get mode table
		  AL = video mode
		  BP = FFFFh  (Known illegal value).
		  SI = 0000h  (Known illegal value).
Return:           ES:BP -> table suitable for mode AL (and subfnc BL=05h)
		  BP = FFFFh on error

Format of ATI VGA Wonder video mode table:
Offset  Size     Description
 00h    BYTE     number of columns
 01h    BYTE     maximum row (number of rows - 1)
 02h    BYTE     scan lines per row
 03h    WORD     video buffer size in bytes
 05h   4 BYTEs   values for Sequencer registers 1-4
 09h    BYTE     value for Miscellaneous Output register
 0Ah   25 BYTEs  values for CRTC registers 00h-18h
		  00h horizontal total size (chars)
		  01h horizontal displayed (chars)
		  02h horizontal sync position (chars)
		  03h horizontal sync width (chars)
		  04h vertical total size (char rows)
		  05h vertical total adjust (scan lines)
		  06h vertical displayed (char rows)
		  07h vertical sync position (char rows)
		  08h interlace mode
		  09h max scan line in row
		  0Ah cursor start scan line
		  0Bh cursor end scan line
		  0Ch screen memory start (high)
		  0Dh screen memory start (low)
		  0Eh cursor address (high)
		  0Fh cursor address (low)
		  10h light pen (high)
		  11h light pen (low)
 23h   20 BYTEs  default palette (values for Attribute Controller regs 00h-13h)
 37h   9 BYTEs   values for Graphics Controller registers 00h-08h
