/**** dsreg.h ****/

struct	dsdevice {       
	/* dma registers for DRV11WA */
	short	dmawc;			/* word count */
	u_short	dmasar;			/* starting address */
	u_short	dmacsr;			/* command status */
	short   dmaodr;                 /* data registers */
					/* for 22-bit addressing
					   the extended address register
					   alternates with the sar
					   The dbr is the input and out
					   put databuffer register. */
	};

# define bit(x)				((1) << (x))

/*
 * DMA csr bits
 */
# define DMA_GO         01              /* go bit */
# define DMA_FN1        02              /* function 1 */
# define DMA_FN2        04              /* function 2 */
# define DMA_FN3        010             /* function 3 */
# define DMA_IE		0100  		/* interrupt enable */
# define DMA_READY      0200            /* ready bit */
# define DMA_CYCLE      0400            /* cycle bit */
# define DMA_MAINT      010000          /* maintenance bit */
# define DMA_ERR	0100000         /* error bit */
# define ALLONES        0xffffffff      /* for clearing DACs */