Improvements Version 2.0: The gates DELAYH, DELAYL, and XNOR were added The options GATEDELAY, WIDTH, and INITIAL were added The TIME and FANOUT options were improved Error detection was improved, as errors in either a circuit descriptor or chip descrip- tor could cause version 1.0 to hang, requir- ing a control-break to stop the program. Now, version 2.0 detects those situations and aborts. Simulation time was improved by altering some of the data structures and simplifying the chip equations when constant highs or lows are present More chip descriptors were added. Version 2.1: Long sequences of 1's and 0's in DATA and CLOCK sources can now be represented by re- peat counts (e.g. 111111 can be typed as (6*1) ). The maximum delay is now 32,767 time units, a great increase over the old limit of 32 time units. ************************************************************ ************************************************************ Planned improvements RAM chip implementation. Attempting to use RAM devices in LOGSIM (still) is a pain, and is cautioned against. DON'T, unless you absolutely have to. It's just hard, not dangerous to code a RAM chip. A future version will have a simple facility for simulating RAM devices. More memory. LOGSIM currently can only use less than 64K for your circuit. In the future, this will expand to the limits of your PC's memory.