/*
 * TOS traps for 32 bit lib
 *	++jrb
 *
 * 10/29/89
 *	constraint changes corresponding to changes documented at the
 *	top of <osbind.h>. (stricter constraint ("r") for inputs to
 *	ensure that ea's are evaluated before we change the stack
 *	from under gcc's nose (without a way of telling it so). See
 *	osbind.h for more details.
 */

#ifndef __MSHORT__

long trap_1_w(short n)
{
       register long retvalue;

       asm volatile
       ("\
               movw    %1,sp@-; \
               trap    #1;      \
               addqw   #2,sp;   \
               movl d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n)                              /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_1_ww(short n, short a)
{
       register long retvalue;

       asm volatile
       ("\
                movw   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #1;      \
               addqw   #4,sp;   \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a)                      /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}

long trap_1_wl(short n, long a)
{
       register long retvalue;

       asm volatile
       ("\
                movl   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #1;      \
               addqw   #6,sp;   \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a)                      /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_1_wlw(short n, long a, short b)
{
       register long retvalue;

       asm volatile
       ("\
               movw    %3,sp@-; \
                movl   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #1;      \
               addqw   #8,sp;   \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a), "r"(b)              /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_1_wwll(short n, short a, long b, long c)
{
       register long retvalue;

       asm volatile
       ("\
               movl    %4,sp@-; \
               movl    %3,sp@-; \
                movw   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #1;      \
               addw    #12,sp;  \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a), "r"(b), "r"(c)      /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_1_wlww(short n, long a, short b, short c)
{
       register long retvalue;

       asm volatile
       ("\
               movw    %4,sp@-; \
               movw    %3,sp@-; \
                movl   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #1;      \
               addw    #10,sp;  \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a), "r"(b), "r"(c)      /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_1_www(short n, short a, short b)
{
       register long retvalue;

       asm volatile
       ("\
               movw    %3,sp@-; \
                movw   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #1;      \
               addqw   #6,sp;   \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a), "r"(b)              /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_1_wll(short n, long a, long b)
{
       register long retvalue;

       asm volatile
       ("\
               movl    %3,sp@-; \
                movl   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #1;      \
               addw    #10,sp;  \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a), "r"(b)              /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_1_wwlll(short n, short a, long b, long c, long d)
{
       register long retvalue;

       asm volatile
       ("\
               movl    %4,sp@-; \
               movl    %3,sp@-; \
               movl    %2,sp@-; \
                movw   %1,sp@-; \
               movw    %0,sp@-; "
        :                      /* outputs */
         : "r"(n), "r"(a), "r"(b), "r"(c), "r"(d) /* inputs  */
       );
       /* no more than 5 operand allowed in asm() -- therefore the split */

       asm volatile
       ("\
               trap    #1;      \
               addw    #16,sp;  \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         :                                     /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_13_wl(short n, long a)
{
       register long retvalue;

       asm volatile
       ("\
                movl   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #13;     \
               addqw   #6,sp;   \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a)                      /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}

long trap_13_w(short n)
{
       register long retvalue;

       asm volatile
       ("\
               movw    %1,sp@-; \
               trap    #13;     \
               addqw   #2,sp;   \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n)                              /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_13_ww(short n, short a)
{
       register long retvalue;

       asm volatile
       ("\
                movw   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #13;     \
               addqw   #4,sp;   \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a)                      /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_13_www(short n, short a, short c)
{
       register long retvalue;

       asm volatile
       ("\
               movw    %3,sp@-; \
                movw   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #13;     \
               addqw   #6,sp;   \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a), "r"(c)              /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}

long trap_13_wwlwww(short n, short a, long c, short d,
                                 short e, short f)
{
       register long retvalue;

       asm volatile
       ("\
               movw    %4,sp@-; \
               movw    %3,sp@-; \
               movw    %2,sp@-; \
               movl    %1,sp@-; \
                movw   %0,sp@-  "
        :                                      /* outputs */
         : "r"(a), "r"(c), "r"(d), "r"(e), "r"(f) /* inputs  */
       );

        asm volatile
        ("\
               movw    %1,sp@-; \
               trap    #13;     \
               addw    #14,sp;  \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n)                              /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );

       return retvalue;
}

long trap_13_wwl(short n, short a, long c)
{
       register long retvalue;

       asm volatile
       ("\
               movl    %3,sp@-; \
                movw   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #13;     \
               addqw   #8,sp;   \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a), "r"(c)              /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_14_wwl(short n, short a, long c)
{
	register long retvalue;

	asm volatile
	("\
		movl    %3,sp@-; \
		movw    %2,sp@-; \
		movw    %1,sp@-; \
		trap    #14;	\
		addqw   #8,sp;	\
		movl    d0,%0"
	: "=g"(retvalue)			/* outputs */
	: "r"(n), "r"(a), "r"(c)                /* inputs  */
	: "d0", "d1", "d2", "a0", "a1", "a2"    /* clobbered regs */
	);
	return retvalue;
}

long trap_14_wwll(short n, short a, long c, long d)
{
       register long retvalue;

       asm volatile
       ("\
               movl    %4,sp@-; \
               movl    %3,sp@-; \
                movw   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #14;     \
               addw    #12,sp;  \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a), "r"(c), "r"(d)      /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}

long trap_14_ww(short n, short a)
{
       register long retvalue;

       asm volatile
       ("\
                movw   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #14;     \
               addqw   #4,sp;   \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a)                      /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}

long trap_14_w(short n)
{
       register long retvalue;

       asm volatile
       ("\
               movw    %1,sp@-; \
               trap    #14;     \
               addqw   #2,sp;   \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n)                              /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_14_wllw(short n, long a, long c, short d)
{
       register long retvalue;

       asm volatile
       ("\
               movw    %4,sp@-; \
               movl    %3,sp@-; \
                movl   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #14;     \
               addw    #12,sp;  \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a), "r"(c), "r"(d)      /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_14_wl(short n, long a)
{
       register long retvalue;

       asm volatile
       ("\
                movl   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #14;     \
               addqw   #6,sp;   \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a)                      /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_14_www(short n, short a, short c)
{
       register long retvalue;

       asm volatile
       ("\
               movw    %3,sp@-; \
                movw   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #14;     \
               addqw   #6,sp;   \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a), "r"(c)              /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_14_wllwwwww(short n, long a, long b, short c,
                                   short d, short e, short f, short g)
{
       register long retvalue;

       asm volatile
       ("\
               movw    %4,sp@-; \
               movw    %3,sp@-; \
               movw    %2,sp@-; \
               movw    %1,sp@-; \
               movw    %0,sp@-  "
        :                                        /* outputs */
         : "r"(c), "r"(d), "r"(e), "r"(f), "r"(g) /* inputs  */
       );

       asm volatile
       ("\
               movl    %3,sp@-; \
                movl   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #14;     \
               addw    #20,sp;  \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a), "r"(b)              /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_14_wllwwwwlw(short n, long a, long b, short c,
                                    short d, short e, short f, long g,
                                    short h)
{
       register long retvalue;

       asm volatile
       ("\
               movw    %4,sp@-; \
               movl    %3,sp@-; \
               movw    %2,sp@-; \
               movw    %1,sp@-; \
               movw    %0,sp@-; "
        :                                      /* outputs */
         : "r"(d), "r"(e), "r"(f), "r"(g), "r"(h) /* inputs  */
       );

       asm volatile
       ("\
               movw    %4,sp@-; \
               movl    %3,sp@-; \
                movl   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #14;     \
               addw    #24,sp;  \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a), "r"(b), "r"(c)      /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}

long trap_14_wllwwwwwlw(short n, long a, long b, short c,
				      short d, short e, short f, short g,
				      long h, short i)
{
	register long retvalue;

	asm volatile
	("\
		movw    %4,sp@-; \
		movl    %3,sp@-; \
		movw    %2,sp@-; \
		movw    %1,sp@-; \
		movw    %0,sp@-; "
	:					/* outputs */
	: "r"(e), "r"(f), "r"(g), "r"(h), "r"(i) /* inputs  */
	);

	asm volatile
	("\
		movw    %4,sp@-; \
		movw    %3,sp@-; \
		movl    %2,sp@-; \
		movl    %1,sp@-; \
                movw    %0,sp@-; "
	:					 /* outputs */
	: "r"(n), "r"(a), "r"(b), "r"(c), "r"(d) /* inputs  */
	);
	asm volatile
	("\
		trap    #14;	\
		addw    #26,sp;	\
		movl    d0,%0"
	: "=g"(retvalue)			/* outputs */
	: 					/* inputs  */
	: "d0", "d1", "d2", "a0", "a1", "a2"    /* clobbered regs */
	);
	return retvalue;
}


long trap_14_wwwwwww(short n, short a, short b, short c,
                                   short d, short e, short f)
{
       register long retvalue;

       asm volatile
       ("\
               movw    %4,sp@-; \
               movw    %3,sp@-; \
               movw    %2,sp@-; \
               movw    %1,sp@-; \
               movw    %0,sp@-; "
        :                                      /* outputs */
         : "r"(b), "r"(c),
          "r"(d), "r"(e), "r"(f)               /* inputs  */
       );

       asm volatile
       ("\
                movw   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #14;     \
               addw    #14,sp;  \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a)                      /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}

long trap_14_wlll(short n, long a, long b, long c)
{
       register long retvalue;

       asm volatile
       ("\
               movl    %4,sp@-; \
               movl    %3,sp@-; \
                movl   %2,sp@-; \
               movw    %1,sp@-; \
               trap    #14;     \
               addw    #14,sp;  \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
         : "r"(n), "r"(a), "r"(b), "r"(c)      /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_14_wllww(short n, long a, long b, short c,
                                short d)
{
       register long retvalue;

       asm volatile
       ("\
               movw    %3,sp@-; \
               movw    %2,sp@-; \
               movl    %1,sp@-; \
               movl    %0,sp@-; "
         :                                     /* outputs */
         : "r"(a), "r"(b), "r"(c), "r"(d)      /* inputs  */
       );

       asm volatile
       ("\
               movw    %1,sp@-; \
               trap    #14;     \
               addw    #14,sp;  \
               movl    d0,%0"
        : "=g"(retvalue)                       /* outputs */
        : "r"(n)                              /* inputs  */
        : "d0", "d1", "d2", "a0", "a1", "a2"   /* clobbered regs */
       );
       return retvalue;
}


long trap_14_wwwwl(short n, short a, short b, short c, long d)
{
       register long retvalue;

       asm volatile
       ("\
               movl    %3,sp@-; \
               movw    %2,sp@-; \
               movw    %1,sp@-; \
               movw    %0,sp@-; "
         :                                     /* outputs */
         : "r"(a), "r"(b), "r"(c), "r"(d)      /* inputs  */
       );

       asm volatile
       ("\
               movw    %1,sp@-; \
               trap    #14;     \
               addw    #12,sp;  \
               movl    d0,%0"
         : "=g"(retvalue)                      /* outputs */
         : "r"(n)                              /* inputs  */
         : "d0", "d1", "d2", "a0", "a1", "a2"  /* clobbered regs */
       );
       return retvalue;
}

#endif /* !__MSHORT__ */