HUNT/CONFIRM SEQUENCE ======================================================================== BITS/STOP/PARITY MODEM TERMINAL DUPLEX HUNT/CONFIRM SPEED SPRINTNET PROCEDURE ======================================================================== 7 1 EVEN 300-1200 FULL 7 1 EVEN 300-1200 HALF ; 7 1 EVEN 2400 FULL @ 7 1 EVEN 2400 HALF @; 8 1 NONE 300-1200 FULL D 8 1 NONE 300-1200 HALF H 8 1 NONE 2400 FULL @D 8 1 NONE 2400 HALF @H