*
* $Header: DH0:src/omti/dist/src/asminclude/RCS/omtihard.i,v 1.1 92/11/25 02:10:33 Barnard Exp $
*
*

*
* Hardware Definitions
*

* Offsets fuer die OMTI-Register

odata			equ	0			; siehe OMTI-Dokumentation
ostatus			equ	2
oreset			equ	2
oconfig			equ	4
oselect			equ	4
omask			equ	6

* Basisadresse des Controllers

omtibase		equ		$ef0641

omtidata		equ		omtibase+odata
omtistatus		equ		omtibase+ostatus
omtireset		equ		omtibase+oreset
omticonfig		equ		omtibase+oconfig
omtiselect		equ		omtibase+oselect
omtimask		equ		omtibase+omask

**** Nummer des verwendeten Interrupts

INTNUM			equ	3

* Bits in den OMTI-Registern

* Status:

oIREQ			equ	5		; 1: Interrupt pending
oDREQ			equ	4		; 1: DMA-Cycle requested
oBSY			equ	3		; 1: Controller is selected
oCD				equ	2		; 1: Command-Bytes / 0: Data-Bytes transferred
oIO				equ	1		; 1: Transfer Controller -> Host / 0: vice versa
oREQ			equ	0		; 1: Byte-Transfer requested

* Data in Status-State

sCS				equ	1			; Fehlerstatus der Kommandos
sLUN			equ	5			; LUN der verwendeten Platte

LUN0			equ 0<<sLUN		; Bit 5 is 0
LUN1			equ	1<<sLUN		; Bit 5 is 1
LUNMASK			equ	1<<sLUN		; Bit 5 in Status-Register

