"Superchip" contender:
MicroUnity's mediaprocessor | |||
The identity of Amiga Inc's "Superchip" remains a mystery. However, Chris Hanretty reckons he may well have found out which chip it might be.
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From the MicroUnity Systems Engineering website. In an interview on this site,
it is said that it "could also be used for the PC", hinting that it may be
destined for Amiga usage.
The Future of Computing and Communications Microprocessors have evolved over the last quarter century as self-contained devices for calculating and controlling things. Growth in electronics is now shifting towards interconnected devices whose primary function is to communicate. The goal of delivering the content and services of the entire global network with an ease and affordability like TV, radio, and telephone rather than PCs will impact processor evolution enough to merit a distinct category: the mediaprocessor. Traditional Versus Communications Oriented ComputingHow do communications algorithms differ from classical
embedded and desktop applications? Classical applications
typically perform arithmetic, boolean, and shift operations on a
few different sizes of data (e.g. 32-bit integers; 64-bit
floating point). Communications processes, on the other hand,
operate on a much wider range of data widths and mathematical
domains (e.g. Galois field). Encryption and error-correction
codes require bit-level and Galois processing; video, RF, and
modem processing need 2 to 12 bits to represent their samples; 8
to 24 bits is common for audio, and thousands of bits for packet
protocols. A single sample may require hundreds or thousands of
operations in the course of filtering, compression, encryption,
modulation, transmission, equalization, demodulation, error
correction, etc. Such high broadband rates strain both
computational throughput and bandwidth of the memory system. On
the other hand, the total memory required is often small,
typically dominated by a few megabytes of frame storage. New mediaprocessor technologies aim
to reduce this cost. One area of innovation is execution units
that systematically and efficiently implement sub-instruction
level parallelism such as SIGD (Single Instruction on Groups of
Data) over all multiprecision data types. Another is programming
models that eliminate redundant register files, condition codes,
and mode bits to simplify code generation and streamline
interlocks, bypass, and exceptions in pipelined and
instruction-level parallel machines (e.g. VLIW, superscaler, and
decoupled access execution designs). A third is efficient
protection and synchronization mechanisms for the sharing of
memory and data path resources among many user-level and
secure-kernel threads of execution, enabling thread-level
parallelism. A fourth is packet-oriented interfaces compatible
with multiple streams of broadband traffic across few packages at
low pin count. Ultimately the dominant cost in broadband evolution will be the development and maintenance of an enormous body of software. Current microprocessor hardware and software is stretching to accomplish the audio, video, graphics, and GUI processing needed at the presentation and application layers of the communications protocol stack. Far greater challenges remain at the lower transport to physical layers where algorithms are evolving to enable broadband and wireless links in the network. The high standards of code robustness needed for these lower layers are inspiring new CASE methodologies, such as symbolic verification. The greatest economy in mediaprocessing will derive from amassing rich software development tools around a general and unified programming model that supports the entire communications protocol suite. |