SECTION text,CODE include 'regs.i' include 'vga.i' BIT_0 EQU $01 BIT_1 EQU $02 BIT_2 EQU $04 BIT_3 EQU $08 BIT_4 EQU $10 BIT_5 EQU $20 BIT_6 EQU $40 BIT_7 EQU $80 N_BIT_0 EQU $FE N_BIT_1 EQU $FD N_BIT_2 EQU $FB N_BIT_3 EQU $F7 N_BIT_4 EQU $EF N_BIT_5 EQU $DF N_BIT_6 EQU $BF N_BIT_7 EQU $7F ; ; Execute l'instruction "BIT \1,\2" Z80 ; TST_BIT MACRO MOVE.B (A3),D2 OR.B #FLAG_H,D2 AND.B #N_FLAG_Z&N_FLAG_N&N_FLAG_V,D2 BTST \1,\2 BNE.S .NBIT\@ OR.B #FLAG_Z!FLAG_V,D2 .NBIT\@ MOVE.B D2,(A3) ENDM RLC MACRO IFC '\1','D2' PEEKA ELSE MOVE.B \1,D2 ENDC ROL.B #1,D2 MOVE CCR,D3 MOVE.B R_FLAGS(A4,D3.W),(A3) IFC '\1','D2' POKEA ELSE MOVE.B D2,\1 ENDC MOVE.B PARITE(A4,D2.W),D1 OR.B D1,(A3) ENDM RRC MACRO IFC '\1','D2' PEEKA ELSE MOVE.B \1,D2 ENDC ROR.B #1,D2 MOVE CCR,D3 MOVE.B R_FLAGS(A4,D3.W),(A3) IFC '\1','D2' POKEA ELSE MOVE.B D2,\1 ENDC MOVE.B PARITE(A4,D2.W),D1 OR.B D1,(A3) ENDM RL MACRO IFC '\1','D2' PEEKA ELSE MOVE.B \1,D2 ENDC MOVE.B (A3),D3 ROXR.B #1,D3 ROXL.B #1,D2 MOVE CCR,D3 MOVE.B R_FLAGS(A4,D3.W),(A3) IFC '\1','D2' POKEA ELSE MOVE.B D2,\1 ENDC MOVE.B PARITE(A4,D2.W),D1 OR.B D1,(A3) ENDM RR MACRO IFC '\1','D2' PEEKA ELSE MOVE.B \1,D2 ENDC MOVE.B (A3),D3 ROXR.B #1,D3 ROXR.B #1,D2 MOVE CCR,D3 MOVE.B R_FLAGS(A4,D3.W),(A3) IFC '\1','D2' POKEA ELSE MOVE.B D2,\1 ENDC MOVE.B PARITE(A4,D2.W),D1 OR.B D1,(A3) ENDM SLA MACRO IFC '\1','D2' PEEKA ELSE MOVE.B \1,D2 ENDC ADD.B D2,D2 MOVE CCR,D3 MOVE.B R_FLAGS(A4,D3.W),(A3) IFC '\1','D2' POKEA ELSE MOVE.B D2,\1 ENDC MOVE.B PARITE(A4,D2.W),D1 OR.B D1,(A3) ENDM SRA MACRO IFC '\1','D2' PEEKA ELSE MOVE.B \1,D2 ENDC ASR.B #1,D2 MOVE CCR,D3 MOVE.B R_FLAGS(A4,D3.W),(A3) IFC '\1','D2' POKEA ELSE MOVE.B D2,\1 ENDC MOVE.B PARITE(A4,D2.W),D1 OR.B D1,(A3) ENDM SRL MACRO IFC '\1','D2' PEEKA ELSE MOVE.B \1,D2 ENDC LSR.B #1,D2 MOVE CCR,D3 MOVE.B R_FLAGS(A4,D3.W),(A3) IFC '\1','D2' POKEA ELSE MOVE.B D2,\1 ENDC MOVE.B PARITE(A4,D2.W),D1 OR.B D1,(A3) ENDM FCB0_B0: ; BIT 0,B TST_BIT #0,REG_B(A4) JMP (A6) FCB0_B1: ; BIT 1,B TST_BIT #1,REG_B(A4) JMP (A6) FCB0_B2: ; BIT 2,B TST_BIT #2,REG_B(A4) JMP (A6) FCB0_B3: ; BIT 3,B TST_BIT #3,REG_B(A4) JMP (A6) FCB0_B4: ; BIT 4,B TST_BIT #4,REG_B(A4) JMP (A6) FCB0_B5: ; BIT 5,B TST_BIT #5,REG_B(A4) JMP (A6) FCB0_B6: ; BIT 6,B TST_BIT #6,REG_B(A4) JMP (A6) FCB0_B7: ; BIT 7,B TST_BIT #7,REG_B(A4) JMP (A6) FCB0_C0: ; BIT 0,C TST_BIT #0,REG_C(A4) JMP (A6) FCB0_C1: ; BIT 1,C TST_BIT #1,REG_C(A4) JMP (A6) FCB0_C2: ; BIT 2,C TST_BIT #2,REG_C(A4) JMP (A6) FCB0_C3: ; BIT 3,C TST_BIT #3,REG_C(A4) JMP (A6) FCB0_C4: ; BIT 4,C TST_BIT #4,REG_C(A4) JMP (A6) FCB0_C5: ; BIT 5,C TST_BIT #5,REG_C(A4) JMP (A6) FCB0_C6: ; BIT 6,C TST_BIT #6,REG_C(A4) JMP (A6) FCB0_C7: ; BIT 7,C TST_BIT #7,REG_C(A4) JMP (A6) FCB0_D0: ; BIT 0,D TST_BIT #0,REG_D(A4) JMP (A6) FCB0_D1: ; BIT 1,D TST_BIT #1,REG_D(A4) JMP (A6) FCB0_D2: ; BIT 2,D TST_BIT #2,REG_D(A4) JMP (A6) FCB0_D3: ; BIT 3,D TST_BIT #3,REG_D(A4) JMP (A6) FCB0_D4: ; BIT 4,D TST_BIT #4,REG_D(A4) JMP (A6) FCB0_D5: ; BIT 5,D TST_BIT #5,REG_D(A4) JMP (A6) FCB0_D6: ; BIT 6,D TST_BIT #6,REG_D(A4) JMP (A6) FCB0_D7: ; BIT 7,D TST_BIT #7,REG_D(A4) JMP (A6) FCB0_E0: ; BIT 0,E TST_BIT #0,REG_E(A4) JMP (A6) FCB0_E1: ; BIT 1,E TST_BIT #1,REG_E(A4) JMP (A6) FCB0_E2: ; BIT 2,E TST_BIT #2,REG_E(A4) JMP (A6) FCB0_E3: ; BIT 3,E TST_BIT #3,REG_E(A4) JMP (A6) FCB0_E4: ; BIT 4,E TST_BIT #4,REG_E(A4) JMP (A6) FCB0_E5: ; BIT 5,E TST_BIT #5,REG_E(A4) JMP (A6) FCB0_E6: ; BIT 6,E TST_BIT #6,REG_E(A4) JMP (A6) FCB0_E7: ; BIT 7,E TST_BIT #7,REG_E(A4) JMP (A6) FCB0_H0: ; BIT 0,H TST_BIT #0,REG_H(A4) JMP (A6) FCB0_H1: ; BIT 1,H TST_BIT #1,REG_H(A4) JMP (A6) FCB0_H2: ; BIT 2,H TST_BIT #2,REG_H(A4) JMP (A6) FCB0_H3: ; BIT 3,H TST_BIT #3,REG_H(A4) JMP (A6) FCB0_H4: ; BIT 4,H TST_BIT #4,REG_H(A4) JMP (A6) FCB0_H5: ; BIT 5,H TST_BIT #5,REG_H(A4) JMP (A6) FCB0_H6: ; BIT 6,H TST_BIT #6,REG_H(A4) JMP (A6) FCB0_H7: ; BIT 7,H TST_BIT #7,REG_H(A4) JMP (A6) FCB0_L0: ; BIT 0,L TST_BIT #0,REG_L(A4) JMP (A6) FCB0_L1: ; BIT 1,L TST_BIT #1,REG_L(A4) JMP (A6) FCB0_L2: ; BIT 2,L TST_BIT #2,REG_L(A4) JMP (A6) FCB0_L3: ; BIT 3,L TST_BIT #3,REG_L(A4) JMP (A6) FCB0_L4: ; BIT 4,L TST_BIT #4,REG_L(A4) JMP (A6) FCB0_L5: ; BIT 5,L TST_BIT #5,REG_L(A4) JMP (A6) FCB0_L6: ; BIT 6,L TST_BIT #6,REG_L(A4) JMP (A6) FCB0_L7: ; BIT 7,L TST_BIT #7,REG_L(A4) JMP (A6) FCB0_HL0: ; BIT 0,(HL) MOVE.W REG_H(A4),D0 PEEK8 D0 TST_BIT #0,D0 JMP (A6) FCB0_HL1: ; BIT 1,(HL) MOVE.W REG_H(A4),D0 PEEK8 D0 TST_BIT #1,D0 JMP (A6) FCB0_HL2: ; BIT 2,(HL) MOVE.W REG_H(A4),D0 PEEK8 D0 TST_BIT #2,D0 JMP (A6) FCB0_HL3: ; BIT 3,(HL) MOVE.W REG_H(A4),D0 PEEK8 D0 TST_BIT #3,D0 JMP (A6) FCB0_HL4: ; BIT 4,(HL) MOVE.W REG_H(A4),D0 PEEK8 D0 TST_BIT #4,D0 JMP (A6) FCB0_HL5: ; BIT 5,(HL) MOVE.W REG_H(A4),D0 PEEK8 D0 TST_BIT #5,D0 JMP (A6) FCB0_HL6: ; BIT 6,(HL) MOVE.W REG_H(A4),D0 PEEK8 D0 TST_BIT #6,D0 JMP (A6) FCB0_HL7: ; BIT 7,(HL) MOVE.W REG_H(A4),D0 PEEK8 D0 TST_BIT #7,D0 JMP (A6) FCB0_A0: ; BIT 0,A TST_BIT #0,(A4) JMP (A6) FCB0_A1: ; BIT 1,A TST_BIT #1,(A4) JMP (A6) FCB0_A2: ; BIT 2,A TST_BIT #2,(A4) JMP (A6) FCB0_A3: ; BIT 3,A TST_BIT #3,(A4) JMP (A6) FCB0_A4: ; BIT 4,A TST_BIT #4,(A4) JMP (A6) FCB0_A5: ; BIT 5,A TST_BIT #5,(A4) JMP (A6) FCB0_A6: ; BIT 6,A TST_BIT #6,(A4) JMP (A6) FCB0_A7: ; BIT 7,A TST_BIT #7,(A4) JMP (A6) FCB1_B0: ; RES 0,B AND.B #N_BIT_0,REG_B(A4) JMP (A6) FCB1_B1: ; RES 1,B AND.B #N_BIT_1,REG_B(A4) JMP (A6) FCB1_B2: ; RES 2,B AND.B #N_BIT_2,REG_B(A4) JMP (A6) FCB1_B3: ; RES 3,B AND.B #N_BIT_3,REG_B(A4) JMP (A6) FCB1_B4: ; RES 4,B AND.B #N_BIT_4,REG_B(A4) JMP (A6) FCB1_B5: ; RES 5,B AND.B #N_BIT_5,REG_B(A4) JMP (A6) FCB1_B6: ; RES 6,B AND.B #N_BIT_6,REG_B(A4) JMP (A6) FCB1_B7: ; RES 7,B AND.B #N_BIT_7,REG_B(A4) JMP (A6) FCB1_C0: ; RES 0,C AND.B #N_BIT_0,REG_C(A4) JMP (A6) FCB1_C1: ; RES 1,C AND.B #N_BIT_1,REG_C(A4) JMP (A6) FCB1_C2: ; RES 2,C AND.B #N_BIT_2,REG_C(A4) JMP (A6) FCB1_C3: ; RES 3,C AND.B #N_BIT_3,REG_C(A4) JMP (A6) FCB1_C4: ; RES 4,C AND.B #N_BIT_4,REG_C(A4) JMP (A6) FCB1_C5: ; RES 5,C AND.B #N_BIT_5,REG_C(A4) JMP (A6) FCB1_C6: ; RES 6,C AND.B #N_BIT_6,REG_C(A4) JMP (A6) FCB1_C7: ; RES 7,C AND.B #N_BIT_7,REG_C(A4) JMP (A6) FCB1_D0: ; RES 0,D AND.B #N_BIT_0,REG_D(A4) JMP (A6) FCB1_D1: ; RES 1,D AND.B #N_BIT_1,REG_D(A4) JMP (A6) FCB1_D2: ; RES 2,D AND.B #N_BIT_2,REG_D(A4) JMP (A6) FCB1_D3: ; RES 3,D AND.B #N_BIT_3,REG_D(A4) JMP (A6) FCB1_D4: ; RES 4,D AND.B #N_BIT_4,REG_D(A4) JMP (A6) FCB1_D5: ; RES 5,D AND.B #N_BIT_5,REG_D(A4) JMP (A6) FCB1_D6: ; RES 6,D AND.B #N_BIT_6,REG_D(A4) JMP (A6) FCB1_D7: ; RES 7,D AND.B #N_BIT_7,REG_D(A4) JMP (A6) FCB1_E0: ; RES 0,E AND.B #N_BIT_0,REG_E(A4) JMP (A6) FCB1_E1: ; RES 1,E AND.B #N_BIT_1,REG_E(A4) JMP (A6) FCB1_E2: ; RES 2,E AND.B #N_BIT_2,REG_E(A4) JMP (A6) FCB1_E3: ; RES 3,E AND.B #N_BIT_3,REG_E(A4) JMP (A6) FCB1_E4: ; RES 4,E AND.B #N_BIT_4,REG_E(A4) JMP (A6) FCB1_E5: ; RES 5,E AND.B #N_BIT_5,REG_E(A4) JMP (A6) FCB1_E6: ; RES 6,E AND.B #N_BIT_6,REG_E(A4) JMP (A6) FCB1_E7: ; RES 7,E AND.B #N_BIT_7,REG_E(A4) JMP (A6) FCB1_H0: ; RES 0,H AND.B #N_BIT_0,REG_H(A4) JMP (A6) FCB1_H1: ; RES 1,H AND.B #N_BIT_1,REG_H(A4) JMP (A6) FCB1_H2: ; RES 2,H AND.B #N_BIT_2,REG_H(A4) JMP (A6) FCB1_H3: ; RES 3,H AND.B #N_BIT_3,REG_H(A4) JMP (A6) FCB1_H4: ; RES 4,H AND.B #N_BIT_4,REG_H(A4) JMP (A6) FCB1_H5: ; RES 5,H AND.B #N_BIT_5,REG_H(A4) JMP (A6) FCB1_H6: ; RES 6,H AND.B #N_BIT_6,REG_H(A4) JMP (A6) FCB1_H7: ; RES 7,H AND.B #N_BIT_7,REG_H(A4) JMP (A6) FCB1_L0: ; RES 0,L AND.B #N_BIT_0,REG_L(A4) JMP (A6) FCB1_L1: ; RES 1,L AND.B #N_BIT_1,REG_L(A4) JMP (A6) FCB1_L2: ; RES 2,L AND.B #N_BIT_2,REG_L(A4) JMP (A6) FCB1_L3: ; RES 3,L AND.B #N_BIT_3,REG_L(A4) JMP (A6) FCB1_L4: ; RES 4,L AND.B #N_BIT_4,REG_L(A4) JMP (A6) FCB1_L5: ; RES 5,L AND.B #N_BIT_5,REG_L(A4) JMP (A6) FCB1_L6: ; RES 6,L AND.B #N_BIT_6,REG_L(A4) JMP (A6) FCB1_L7: ; RES 7,L AND.B #N_BIT_7,REG_L(A4) JMP (A6) FCB1_HL0: ; RES 0,(HL) MOVE.W REG_H(A4),D0 PEEKA AND.B #N_BIT_0,D2 POKEA JMP (A6) FCB1_HL1: ; RES 1,(HL) MOVE.W REG_H(A4),D0 PEEKA AND.B #N_BIT_1,D2 POKEA JMP (A6) FCB1_HL2: ; RES 2,(HL) MOVE.W REG_H(A4),D0 PEEKA AND.B #N_BIT_2,D2 POKEA JMP (A6) FCB1_HL3: ; RES 3,(HL) MOVE.W REG_H(A4),D0 PEEKA AND.B #N_BIT_3,D2 POKEA JMP (A6) FCB1_HL4: ; RES 4,(HL) MOVE.W REG_H(A4),D0 PEEKA AND.B #N_BIT_4,D2 POKEA JMP (A6) FCB1_HL5: ; RES 5,(HL) MOVE.W REG_H(A4),D0 PEEKA AND.B #N_BIT_5,D2 POKEA JMP (A6) FCB1_HL6: ; RES 6,(HL) MOVE.W REG_H(A4),D0 PEEKA AND.B #N_BIT_6,D2 POKEA JMP (A6) FCB1_HL7: ; RES 7,(HL) MOVE.W REG_H(A4),D0 PEEKA AND.B #N_BIT_7,D2 POKEA JMP (A6) FCB1_A0: ; RES 0,A AND.B #N_BIT_0,(A4) JMP (A6) FCB1_A1: ; RES 1,A AND.B #N_BIT_1,(A4) JMP (A6) FCB1_A2: ; RES 2,A AND.B #N_BIT_2,(A4) JMP (A6) FCB1_A3: ; RES 3,A AND.B #N_BIT_3,(A4) JMP (A6) FCB1_A4: ; RES 4,A AND.B #N_BIT_4,(A4) JMP (A6) FCB1_A5: ; RES 5,A AND.B #N_BIT_5,(A4) JMP (A6) FCB1_A6: ; RES 6,A AND.B #N_BIT_6,(A4) JMP (A6) FCB1_A7: ; RES 7,A AND.B #N_BIT_7,(A4) JMP (A6) FCB2_B0: ; SET 0,B OR.B #BIT_0,REG_B(A4) JMP (A6) FCB2_B1: ; SET 1,B OR.B #BIT_1,REG_B(A4) JMP (A6) FCB2_B2: ; SET 2,B OR.B #BIT_2,REG_B(A4) JMP (A6) FCB2_B3: ; SET 3,B OR.B #BIT_3,REG_B(A4) JMP (A6) FCB2_B4: ; SET 4,B OR.B #BIT_4,REG_B(A4) JMP (A6) FCB2_B5: ; SET 5,B OR.B #BIT_5,REG_B(A4) JMP (A6) FCB2_B6: ; SET 6,B OR.B #BIT_6,REG_B(A4) JMP (A6) FCB2_B7: ; SET 7,B OR.B #BIT_7,REG_B(A4) JMP (A6) FCB2_C0: ; SET 0,C OR.B #BIT_0,REG_C(A4) JMP (A6) FCB2_C1: ; SET 1,C OR.B #BIT_1,REG_C(A4) JMP (A6) FCB2_C2: ; SET 2,C OR.B #BIT_2,REG_C(A4) JMP (A6) FCB2_C3: ; SET 3,C OR.B #BIT_3,REG_C(A4) JMP (A6) FCB2_C4: ; SET 4,C OR.B #BIT_4,REG_C(A4) JMP (A6) FCB2_C5: ; SET 5,C OR.B #BIT_5,REG_C(A4) JMP (A6) FCB2_C6: ; SET 6,C OR.B #BIT_6,REG_C(A4) JMP (A6) FCB2_C7: ; SET 7,C OR.B #BIT_7,REG_C(A4) JMP (A6) FCB2_D0: ; SET 0,D OR.B #BIT_0,REG_D(A4) JMP (A6) FCB2_D1: ; SET 1,D OR.B #BIT_1,REG_D(A4) JMP (A6) FCB2_D2: ; SET 2,D OR.B #BIT_2,REG_D(A4) JMP (A6) FCB2_D3: ; SET 3,D OR.B #BIT_3,REG_D(A4) JMP (A6) FCB2_D4: ; SET 4,D OR.B #BIT_4,REG_D(A4) JMP (A6) FCB2_D5: ; SET 5,D OR.B #BIT_5,REG_D(A4) JMP (A6) FCB2_D6: ; SET 6,D OR.B #BIT_6,REG_D(A4) JMP (A6) FCB2_D7: ; SET 7,D OR.B #BIT_7,REG_D(A4) JMP (A6) FCB2_E0: ; SET 0,E OR.B #BIT_0,REG_E(A4) JMP (A6) FCB2_E1: ; SET 1,E OR.B #BIT_1,REG_E(A4) JMP (A6) FCB2_E2: ; SET 2,E OR.B #BIT_2,REG_E(A4) JMP (A6) FCB2_E3: ; SET 3,E OR.B #BIT_3,REG_E(A4) JMP (A6) FCB2_E4: ; SET 4,E OR.B #BIT_4,REG_E(A4) JMP (A6) FCB2_E5: ; SET 5,E OR.B #BIT_5,REG_E(A4) JMP (A6) FCB2_E6: ; SET 6,E OR.B #BIT_6,REG_E(A4) JMP (A6) FCB2_E7: ; SET 7,E OR.B #BIT_7,REG_E(A4) JMP (A6) FCB2_H0: ; SET 0,H OR.B #BIT_0,REG_H(A4) JMP (A6) FCB2_H1: ; SET 1,H OR.B #BIT_1,REG_H(A4) JMP (A6) FCB2_H2: ; SET 2,H OR.B #BIT_2,REG_H(A4) JMP (A6) FCB2_H3: ; SET 3,H OR.B #BIT_3,REG_H(A4) JMP (A6) FCB2_H4: ; SET 4,H OR.B #BIT_4,REG_H(A4) JMP (A6) FCB2_H5: ; SET 5,H OR.B #BIT_5,REG_H(A4) JMP (A6) FCB2_H6: ; SET 6,H OR.B #BIT_6,REG_H(A4) JMP (A6) FCB2_H7: ; SET 7,H OR.B #BIT_7,REG_H(A4) JMP (A6) FCB2_L0: ; SET 0,L OR.B #BIT_0,REG_L(A4) JMP (A6) FCB2_L1: ; SET 1,L OR.B #BIT_1,REG_L(A4) JMP (A6) FCB2_L2: ; SET 2,L OR.B #BIT_2,REG_L(A4) JMP (A6) FCB2_L3: ; SET 3,L OR.B #BIT_3,REG_L(A4) JMP (A6) FCB2_L4: ; SET 4,L OR.B #BIT_4,REG_L(A4) JMP (A6) FCB2_L5: ; SET 5,L OR.B #BIT_5,REG_L(A4) JMP (A6) FCB2_L6: ; SET 6,L OR.B #BIT_6,REG_L(A4) JMP (A6) FCB2_L7: ; SET 7,L OR.B #BIT_7,REG_L(A4) JMP (A6) FCB2_HL0: ; SET 0,(HL) MOVE.W REG_H(A4),D0 PEEKA OR.B #BIT_0,D2 POKEA JMP (A6) FCB2_HL1: ; SET 1,(HL) MOVE.W REG_H(A4),D0 PEEKA OR.B #BIT_1,D2 POKEA JMP (A6) FCB2_HL2: ; SET 2,(HL) MOVE.W REG_H(A4),D0 PEEKA OR.B #BIT_2,D2 POKEA JMP (A6) FCB2_HL3: ; SET 3,(HL) MOVE.W REG_H(A4),D0 PEEKA OR.B #BIT_3,D2 POKEA JMP (A6) FCB2_HL4: ; SET 4,(HL) MOVE.W REG_H(A4),D0 PEEKA OR.B #BIT_4,D2 POKEA JMP (A6) FCB2_HL5: ; SET 5,(HL) MOVE.W REG_H(A4),D0 PEEKA OR.B #BIT_5,D2 POKEA JMP (A6) FCB2_HL6: ; SET 6,(HL) MOVE.W REG_H(A4),D0 PEEKA OR.B #BIT_6,D2 POKEA JMP (A6) FCB2_HL7: ; SET 7,(HL) MOVE.W REG_H(A4),D0 PEEKA OR.B #BIT_7,D2 POKEA JMP (A6) FCB2_A0: ; SET 0,A OR.B #BIT_0,(A4) JMP (A6) FCB2_A1: ; SET 1,A OR.B #BIT_1,(A4) JMP (A6) FCB2_A2: ; SET 2,A OR.B #BIT_2,(A4) JMP (A6) FCB2_A3: ; SET 3,A OR.B #BIT_3,(A4) JMP (A6) FCB2_A4: ; SET 4,A OR.B #BIT_4,(A4) JMP (A6) FCB2_A5: ; SET 5,A OR.B #BIT_5,(A4) JMP (A6) FCB2_A6: ; SET 6,A OR.B #BIT_6,(A4) JMP (A6) FCB2_A7: ; SET 7,A OR.B #BIT_7,(A4) JMP (A6) FCB3_B: ; RLC B RLC REG_B(A4) JMP (A6) FCB3_C: ; RLC C RLC REG_C(A4) JMP (A6) FCB3_D: ; RLC D RLC REG_D(A4) JMP (A6) FCB3_E: ; RLC E RLC REG_E(A4) JMP (A6) FCB3_H: ; RLC H RLC REG_H(A4) JMP (A6) FCB3_L: ; RLC L RLC REG_L(A4) JMP (A6) FCB3_HL: ; RLC (HL) MOVE.W REG_H(A4),D0 RLC D2 JMP (A6) FCB3_A: ; RLC A RLC (A4) JMP (A6) FCB4_B: ; RRC B RRC REG_B(A4) JMP (A6) FCB4_C: ; RRC C RRC REG_C(A4) JMP (A6) FCB4_D: ; RRC D RRC REG_D(A4) JMP (A6) FCB4_E: ; RRC E RRC REG_E(A4) JMP (A6) FCB4_H: ; RRC H RRC REG_H(A4) JMP (A6) FCB4_L: ; RRC L RRC REG_L(A4) JMP (A6) FCB4_HL: ; RRC (HL) MOVE.W REG_H(A4),D0 RRC D2 JMP (A6) FCB4_A: ; RRC A RRC (A4) JMP (A6) FCB5_B: ; RL B RL REG_B(A4) JMP (A6) FCB5_C: ; RL C RL REG_C(A4) JMP (A6) FCB5_D: ; RL D RL REG_D(A4) JMP (A6) FCB5_E: ; RL E RL REG_E(A4) JMP (A6) FCB5_H: ; RL H RL REG_H(A4) JMP (A6) FCB5_L: ; RL L RL REG_L(A4) JMP (A6) FCB5_HL: ; RL (HL) MOVE.W REG_H(A4),D0 RL D2 JMP (A6) FCB5_A: ; RL A RL (A4) JMP (A6) FCB6_B: ; RR B RR REG_B(A4) JMP (A6) FCB6_C: ; RR C RR REG_C(A4) JMP (A6) FCB6_D: ; RR D RR REG_D(A4) JMP (A6) FCB6_E: ; RR E RR REG_E(A4) JMP (A6) FCB6_H: ; RR H RR REG_H(A4) JMP (A6) FCB6_L: ; RR L RR REG_L(A4) JMP (A6) FCB6_HL: ; RR (HL) MOVE.W REG_H(A4),D0 RR D2 JMP (A6) FCB6_A: ; RR A RR (A4) JMP (A6) FCB7_B: ; SLA B SLA REG_B(A4) JMP (A6) FCB7_C: ; SLA C SLA REG_C(A4) JMP (A6) FCB7_D: ; SLA D SLA REG_D(A4) JMP (A6) FCB7_E: ; SLA E SLA REG_E(A4) JMP (A6) FCB7_H: ; SLA H SLA REG_H(A4) JMP (A6) FCB7_L: ; SLA L SLA REG_L(A4) JMP (A6) FCB7_HL: ; SLA (HL) MOVE.W REG_H(A4),D0 SLA D2 JMP (A6) FCB7_A: ; SLA A SLA (A4) JMP (A6) FCB8_B: ; SRA B SRA REG_B(A4) JMP (A6) FCB8_C: ; SRA C SRA REG_C(A4) JMP (A6) FCB8_D: ; SRA D SRA REG_D(A4) JMP (A6) FCB8_E: ; SRA E SRA REG_E(A4) JMP (A6) FCB8_H: ; SRA H SRA REG_H(A4) JMP (A6) FCB8_L: ; SRA L SRA REG_L(A4) JMP (A6) FCB8_HL: ; SRA (HL) MOVE.W REG_H(A4),D0 SRA D2 JMP (A6) FCB8_A: ; SRA A SRA (A4) JMP (A6) FCBA_B: ; SRL B SRL REG_B(A4) JMP (A6) FCBA_C: ; SRL C SRL REG_C(A4) JMP (A6) FCBA_D: ; SRL D SRL REG_D(A4) JMP (A6) FCBA_E: ; SRL E SRL REG_E(A4) JMP (A6) FCBA_H: ; SRL H SRL REG_H(A4) JMP (A6) FCBA_L: ; SRL L SRL REG_L(A4) JMP (A6) FCBA_HL: ; SRL (HL) MOVE.W REG_H(A4),D0 SRL D2 JMP (A6) FCBA_A: ; SRL A SRL (A4) JMP (A6) SECTION data,DATA TabCB: DC.L FCB3_B,FCB3_C,FCB3_D,FCB3_E,FCB3_H,FCB3_L,FCB3_HL,FCB3_A DC.L FCB4_B,FCB4_C,FCB4_D,FCB4_E,FCB4_H,FCB4_L,FCB4_HL,FCB4_A DC.L FCB5_B,FCB5_C,FCB5_D,FCB5_E,FCB5_H,FCB5_L,FCB5_HL,FCB5_A DC.L FCB6_B,FCB6_C,FCB6_D,FCB6_E,FCB6_H,FCB6_L,FCB6_HL,FCB6_A DC.L FCB7_B,FCB7_C,FCB7_D,FCB7_E,FCB7_H,FCB7_L,FCB7_HL,FCB7_A DC.L FCB8_B,FCB8_C,FCB8_D,FCB8_E,FCB8_H,FCB8_L,FCB8_HL,FCB8_A DC.L FCB7_B,FCB7_C,FCB7_D,FCB7_E,FCB7_H,FCB7_L,FCB7_HL,FCB7_A DC.L FCBA_B,FCBA_C,FCBA_D,FCBA_E,FCBA_H,FCBA_L,FCBA_HL,FCBA_A DC.L FCB0_B0,FCB0_C0,FCB0_D0,FCB0_E0,FCB0_H0,FCB0_L0,FCB0_HL0,FCB0_A0 DC.L FCB0_B1,FCB0_C1,FCB0_D1,FCB0_E1,FCB0_H1,FCB0_L1,FCB0_HL1,FCB0_A1 DC.L FCB0_B2,FCB0_C2,FCB0_D2,FCB0_E2,FCB0_H2,FCB0_L2,FCB0_HL2,FCB0_A2 DC.L FCB0_B3,FCB0_C3,FCB0_D3,FCB0_E3,FCB0_H3,FCB0_L3,FCB0_HL3,FCB0_A3 DC.L FCB0_B4,FCB0_C4,FCB0_D4,FCB0_E4,FCB0_H4,FCB0_L4,FCB0_HL4,FCB0_A4 DC.L FCB0_B5,FCB0_C5,FCB0_D5,FCB0_E5,FCB0_H5,FCB0_L5,FCB0_HL5,FCB0_A5 DC.L FCB0_B6,FCB0_C6,FCB0_D6,FCB0_E6,FCB0_H6,FCB0_L6,FCB0_HL6,FCB0_A6 DC.L FCB0_B7,FCB0_C7,FCB0_D7,FCB0_E7,FCB0_H7,FCB0_L7,FCB0_HL7,FCB0_A7 DC.L FCB1_B0,FCB1_C0,FCB1_D0,FCB1_E0,FCB1_H0,FCB1_L0,FCB1_HL0,FCB1_A0 DC.L FCB1_B1,FCB1_C1,FCB1_D1,FCB1_E1,FCB1_H1,FCB1_L1,FCB1_HL1,FCB1_A1 DC.L FCB1_B2,FCB1_C2,FCB1_D2,FCB1_E2,FCB1_H2,FCB1_L2,FCB1_HL2,FCB1_A2 DC.L FCB1_B3,FCB1_C3,FCB1_D3,FCB1_E3,FCB1_H3,FCB1_L3,FCB1_HL3,FCB1_A3 DC.L FCB1_B4,FCB1_C4,FCB1_D4,FCB1_E4,FCB1_H4,FCB1_L4,FCB1_HL4,FCB1_A4 DC.L FCB1_B5,FCB1_C5,FCB1_D5,FCB1_E5,FCB1_H5,FCB1_L5,FCB1_HL5,FCB1_A5 DC.L FCB1_B6,FCB1_C6,FCB1_D6,FCB1_E6,FCB1_H6,FCB1_L6,FCB1_HL6,FCB1_A6 DC.L FCB1_B7,FCB1_C7,FCB1_D7,FCB1_E7,FCB1_H7,FCB1_L7,FCB1_HL7,FCB1_A7 DC.L FCB2_B0,FCB2_C0,FCB2_D0,FCB2_E0,FCB2_H0,FCB2_L0,FCB2_HL0,FCB2_A0 DC.L FCB2_B1,FCB2_C1,FCB2_D1,FCB2_E1,FCB2_H1,FCB2_L1,FCB2_HL1,FCB2_A1 DC.L FCB2_B2,FCB2_C2,FCB2_D2,FCB2_E2,FCB2_H2,FCB2_L2,FCB2_HL2,FCB2_A2 DC.L FCB2_B3,FCB2_C3,FCB2_D3,FCB2_E3,FCB2_H3,FCB2_L3,FCB2_HL3,FCB2_A3 DC.L FCB2_B4,FCB2_C4,FCB2_D4,FCB2_E4,FCB2_H4,FCB2_L4,FCB2_HL4,FCB2_A4 DC.L FCB2_B5,FCB2_C5,FCB2_D5,FCB2_E5,FCB2_H5,FCB2_L5,FCB2_HL5,FCB2_A5 DC.L FCB2_B6,FCB2_C6,FCB2_D6,FCB2_E6,FCB2_H6,FCB2_L6,FCB2_HL6,FCB2_A6 DC.L FCB2_B7,FCB2_C7,FCB2_D7,FCB2_E7,FCB2_H7,FCB2_L7,FCB2_HL7,FCB2_A7 XDEF TabCB END