; vbl_on:
; ------
; enable the vbl interrupt of the VDC

vbl_on:
	smb3  <_creg
	vreg  #$5
	lda   <_creg
	sta   $0002
	rts

; vbl_off:
; -------
; disable the vbl interrupt of the VDC

vbl_off:
	rmb3  <_creg
	vreg  #$5
	lda   <_creg
	sta   $0002
	rts

; set_palette:
; -----------
; initialize one or more sub-palette
;
; IN :  _AL = index of the first sub-palette (0-31)
;       _SI = address of the color table
;       _CL = number of sub_palette to copy

set_palette:
	lda   <_al		; mulitply the sub-palette index by 16
	stz   <_ah		; and set the color index of the VCE
	asl   A
	asl   A
	asl   A
	asl   A
	rol   <_ah
	sta   $0402
	lda   <_ah
	sta   $0403

	cly
.loop_a:
	ldx   #16
.loop_b:
	lda   [_si],Y		; set a color
	iny
	sta   $0404
	lda   [_si],Y
	sta   $0405
	iny
	bne   .next
	inc   <_si+1
.next:  dex			; next color
	bne   .loop_b

	dec   <_cl		; next sub-palette
	bne   .loop_a
	rts

; set_sprite:
; ----------
; change the attributes of a sprite
;
; IN:   A = sprite number (0-63) 
;       _SI = pointer to a SATB entry 
;       _CL = number of sprites to copy
;
; NOTE: this procedure assumes that the SATB is located
;       at address $7F00 in the VRAM

set_sprite:
	asl   A
	asl   A
	sta   <_di
	lda   #$7F
	sta   <_di+1
	lda   <_cl
	asl   A
	asl   A
	sta   <_cl
	stz   <_ch
	jmp   load_vram

; load_vram:
; ---------
; copy a block of memory to the VRAM
;
; IN:   _DI = VRAM location
;       _SI = memory location
;       _CX = number of words to copy

load_vram:
	jsr   set_write
	cly
.loop:	lda   [_si],Y
	sta   $0002
	iny
	lda   [_si],Y
	sta   $0003
	iny
	bne   .next
	inc   <_si+1
.next:  decw  <_cx
	lda   <_cl
	ora   <_ch
	bne   .loop
	rts

; set_read:
; ---------
; initialize the VRAM for reading
;
; IN:   _DI = VRAM location

set_read:
	vreg  #$01
	lda   <_di 
	sta   $0002
	lda   <_di+1
	sta   $0003
	vreg  #$02
	rts 

; set_write:
; ---------
; initialize the VRAM for writing
;
; IN:   _DI = VRAM location

set_write:
	vreg  #$00
	lda   <_di 
	sta   $0002
	lda   <_di+1
	sta   $0003
	vreg  #$02
	rts 

; init_vdc:
; --------
; initialize the video controller :
;   + screen mode to 256x240
;   + display and sprites off
;   + no interrupts
;   + virtual screen size to 512x256
;   + SATB to $7F00.

init_vdc:
	stwi  .table,<_si 	; put the table address into ZP[4]
	cly 
.loop:	lda   [_si],Y		; select the VDC register
	iny
	sta   <_vreg
	sta   $0000
	lda   [_si],Y		; send the 16bit data
	iny 
	sta   $0002
	lda   [_si],Y
	iny 
	sta   $0003
	cpy   #36		; loop if not at the end of the
	bne   .loop		; table
	rts 

.table:	db $05,$00,$00		; CR    VDC control register
	db $06,$00,$00		; RCR	scanline interrupt counter
	db $07,$00,$00		; BXR   background horizontal scroll offset
	db $08,$00,$00		; BYR        "     vertical   	"      "
	db $09,$10,$00		; MWR   size of the virtual screen
	db $0A,$02,$02		; HSR |
	db $0B,$1F,$04		; HDR |	define the size and synchro
	db $0C,$02,$0F		; VPR |	of the display
	db $0D,$EF,$00		; VDW |
	db $0E,$04,$00		; VCR |
	db $0F,$10,$00		; DCR   DMA control register
	db $13,$00,$7F		; SATB  address of the SATB

; init_psg:
; --------
; initialize the sound generator.

init_psg:
	stz   $0801		; main volume to zero
	stz   $0809		; disable the LFO
	
	lda   #5		; set volume to zero for each channel (0-5)
.clear:	sta   $0800
	stz   $0804
	dec   A
	bpl   .clear
	rts