DSP COFF Assembler Version 5.20 Sun Jan 02 19:07:21 1994 (c) Copyright 1987, 1989, Texas Instruments Incorporated PAGE 1 0001 *************************************************************** 0002 *************************************************************** 0003 * * 0004 * FOO.ASM - sample C25 code for demonstrating C25SIM * 0005 * * 0006 *************************************************************** 0007 *************************************************************** 0008 0009 0000 DRR .equ 0000h 0010 0002 TIMER .equ 0002h 0011 0003 PERIOD .equ 0003h 0012 0004 IMR .equ 0004h 0013 001e STRLEN .equ 30 0014 0064 STACK_SIZE .equ 100 ; This stack saves context during interrupt 0015 0016 *************************************************************** 0017 * Labels and variables 0018 0019 ; Here are globally defined labels that will appear in FOO.MAP 0020 .globl _startup 0021 .globl _nada 0022 .globl _idle_here 0023 0024 ; Globally defined interrupt handler labels 0025 .globl tint 0026 .globl rint 0027 0028 ; Here are global variables that will appear in FOO.MAP 0029 .globl _i 0030 0000 .bss _i,1 0031 .globl _k 0032 0001 .bss _k,1 0033 .globl _L 0034 0002 .bss _L,1 0035 .globl rstring 0036 0003 .bss rstring,STRLEN 0037 .globl cptr 0038 0021 .bss cptr,1 0039 0040 0022 .bss sys_stack,STACK_SIZE 0041 0042 *************************************************************** 0043 * Reset and interrupt vectors, and code, begin here 0044 *************************************************************** 0045 0046 0000 .asect "vectors",0 0047 0048 ; Reset and interrupt vectors 0049 0000 ff80 B _startup ; 0x0000 0001 0000' 0050 ; B int0 ; 0x0002 0051 ; B int1 ; 0x0004 0052 ; B int2 ; 0x0006 0053 0002 .space (018h-$)*16 0054 0018 ff80 B tint ; 0x0018 0019 003b' DSP COFF Assembler Version 5.20 Sun Jan 02 19:07:21 1994 (c) Copyright 1987, 1989, Texas Instruments Incorporated PAGE 2 0055 001a ff80 B rint ; 0x001A 001b 006b' 0056 ; B xint ; 0x001C 0057 ; B traph ; 0x001E 0058 0059 *************************************************************** 0060 * This is the main loop 0061 0000 .text 0062 0063 0000 _startup: 0064 0000 d100 lrlk AR1,sys_stack ; Set up stack pointer 0001 0022- 0065 0066 0002 c800 ldpk 0 0067 0003 d001 lack 500 ; set up a timed interrupt for every 0004 01f4 0068 0005 6002 sacl TIMER ; 500 processor cycles 0069 0006 6003 sacl PERIOD 0070 0007 ca18 lack 18h ; Enable timer and receive interrupts 0071 0008 6004 sacl IMR 0072 0009 ce00 eint ; Enable interrupts globally 0073 0074 000a d000 lrlk ar0,rstring 000b 0003- 0075 000c 5588 larp ar0 0076 000d ca00 lack 0 ; Fill rstring with zeroes 0077 000e cb1d rptk STRLEN-1 0078 000f 60a0 sacl *+ 0079 0010 d001 lalk rstring ; Set cptr pointing to rstring 0011 0003- 0080 0012 6021- sacl cptr 0081 0082 0013 c800- ldpk _k 0083 0014 ca00 lack 0 0084 0015 6001- sacl _k ; Set _k and _L to zero 0085 0016 6002- sacl _L 0086 0087 0017 c400 lark ar4,0 ; Set AR4 and AR5 to zero 0088 0018 c500 lark ar5,0 0089 0019 L1: 0090 0019 558c larp ar4 ; Do some bit-reverse addressing 0091 001a c008 lark ar0,8 0092 001b 55fd mar *br0+,ar5 0093 001c 55c8 mar *br0-,ar0 0094 0095 001d fe80 call _nada ; Call a subroutine 001e 002f' 0096 0097 001f c800- ldpk _i 0098 0020 ca00 lack 0 ; Set _i to zero 0099 0021 6000- sacl _i 0100 0022 c009 lark ar0,9 ; do loop L2 ten times 0101 0023 L2: 0102 0023 3c00- lt _i ; _k gets set to 17 * _i 0103 0024 a011 mpyk 17 0104 0025 7c01- spl _k DSP COFF Assembler Version 5.20 Sun Jan 02 19:07:21 1994 (c) Copyright 1987, 1989, Texas Instruments Incorporated PAGE 3 0105 0026 2000- lac _i ; _i gets incremented 0106 0027 cc01 addk 1 0107 0028 6000- sacl _i 0108 0109 0029 L3: 0110 0029 fb90 banz L2,*- ; end of L2 loop 002a 0023' 0111 0112 002b fe80 call _test_idle 002c 0032' 0113 0114 002d ff80 b L1 002e 0019' 0115 0116 *************************************************************** 0117 * A little do-nothing subroutine 0118 0119 002f 5500 _nada: nop 0120 0030 5500 nop 0121 0031 ce26 ret 0122 0123 *************************************************************** 0124 * When _L reaches 15, idle until the next interrupt 0125 0126 0032 _test_idle: 0127 0032 2002- lac _L ; if _L = 15, 0128 0033 cd0f subk 15 0129 0034 f580 bnz skip_idle 0035 003a' 0130 0036 d001 lack 1234h ; then set _k to an odd value 0037 1234 0131 0038 6001- sacl _k 0132 0039 _idle_here: 0133 0039 ce1f idle ; and idle until the next interrupt 0134 003a skip_idle: 0135 003a ce26 ret 0136 0137 *************************************************************** 0138 * Macros for context save and restore, used in interrupt handle 0139 0140 isave $MACRO 0141 larp ar1 0142 sst1 *+ ; status registers 0143 sst *+ 0144 sach *+ ; accumulator 0145 sacl *+ 0146 spm 0 ; P register 0147 sph *+ 0148 spl *+ 0149 mpyk 1 ; T register 0150 spl *+ 0151 rptk 7 ; the entire hardware stack 0152 popd *+ 0153 sar ar0,*+ ; all the address registers 0154 sar ar2,*+ 0155 sar ar3,*+ DSP COFF Assembler Version 5.20 Sun Jan 02 19:07:21 1994 (c) Copyright 1987, 1989, Texas Instruments Incorporated PAGE 4 0156 sar ar4,*+ 0157 sar ar5,*+ 0158 sar ar6,*+ 0159 sar ar7,*+ 0160 $END 0161 0162 irestore $MACRO 0163 larp ar1 0164 mar *- ; prepare to pop stuff 0165 lar ar7,*- ; get address registers 0166 lar ar6,*- 0167 lar ar5,*- 0168 lar ar4,*- 0169 lar ar3,*- 0170 lar ar2,*- 0171 lar ar0,*- 0172 rptk 7 ; the hardware stack 0173 pshd *- 0174 mar *- 0175 lt *+ ; low P register 0176 mpyk 1 0177 lt *- ; T register 0178 mar *- 0179 lph *- ; high P register 0180 zals *- ; accumulator 0181 addh *- 0182 lst *- ; status registers 0183 lst1 * 0184 $END 0185 0186 *************************************************************** 0187 * The timer interrupt increments _L 0188 0189 003b tint: isave !0001 003b 5589 larp ar1 !0002 003c 79a0 sst1 *+ !0003 003d 78a0 sst *+ !0004 003e 68a0 sach *+ !0005 003f 60a0 sacl *+ !0006 0040 ce08 spm 0 !0007 0041 7da0 sph *+ !0008 0042 7ca0 spl *+ !0009 0043 a001 mpyk 1 !0010 0044 7ca0 spl *+ !0011 0045 cb07 rptk 7 !0012 0046 7aa0 popd *+ !0013 0047 70a0 sar ar0,*+ !0014 0048 72a0 sar ar2,*+ !0015 0049 73a0 sar ar3,*+ !0016 004a 74a0 sar ar4,*+ !0017 004b 75a0 sar ar5,*+ !0018 004c 76a0 sar ar6,*+ !0019 004d 77a0 sar ar7,*+ 0190 004e 5588 larp ar0 0191 004f d000 lrlk ar0,_L ; increment _L 0050 0002- DSP COFF Assembler Version 5.20 Sun Jan 02 19:07:21 1994 (c) Copyright 1987, 1989, Texas Instruments Incorporated PAGE 5 0192 0051 2080 lac * 0193 0052 cc01 addk 1 0194 0053 6080 sacl * 0195 0054 irestore !0001 0054 5589 larp ar1 !0002 0055 5590 mar *- !0003 0056 3790 lar ar7,*- !0004 0057 3690 lar ar6,*- !0005 0058 3590 lar ar5,*- !0006 0059 3490 lar ar4,*- !0007 005a 3390 lar ar3,*- !0008 005b 3290 lar ar2,*- !0009 005c 3090 lar ar0,*- !0010 005d cb07 rptk 7 !0011 005e 5490 pshd *- !0012 005f 5590 mar *- !0013 0060 3ca0 lt *+ !0014 0061 a001 mpyk 1 !0015 0062 3c90 lt *- !0016 0063 5590 mar *- !0017 0064 5390 lph *- !0018 0065 4190 zals *- !0019 0066 4890 addh *- !0020 0067 5090 lst *- !0021 0068 5180 lst1 * 0196 0069 ce00 eint 0197 006a ce26 ret 0198 0199 *************************************************************** 0200 * The receive interrupt fills rstring with data 0201 0202 006b rint: isave !0001 006b 5589 larp ar1 !0002 006c 79a0 sst1 *+ !0003 006d 78a0 sst *+ !0004 006e 68a0 sach *+ !0005 006f 60a0 sacl *+ !0006 0070 ce08 spm 0 !0007 0071 7da0 sph *+ !0008 0072 7ca0 spl *+ !0009 0073 a001 mpyk 1 !0010 0074 7ca0 spl *+ !0011 0075 cb07 rptk 7 !0012 0076 7aa0 popd *+ !0013 0077 70a0 sar ar0,*+ !0014 0078 72a0 sar ar2,*+ !0015 0079 73a0 sar ar3,*+ !0016 007a 74a0 sar ar4,*+ !0017 007b 75a0 sar ar5,*+ !0018 007c 76a0 sar ar6,*+ !0019 007d 77a0 sar ar7,*+ 0203 007e c800- ldpk cptr 0204 007f 3021- lar ar0,cptr ; get a pointer into rstring from cptr 0205 0080 c200 lark ar2,DRR 0206 0081 558a larp ar2 0207 0082 2088 lac *,ar0 ; get data from receive buffer DSP COFF Assembler Version 5.20 Sun Jan 02 19:07:21 1994 (c) Copyright 1987, 1989, Texas Instruments Incorporated PAGE 6 0208 0083 60a0 sacl *+ ; store it in rstring 0209 0084 7021- sar ar0,cptr ; store incremented pointer in cptr 0210 0085 f580 bnz rint2 0086 0090' 0211 0087 d000 lrlk ar0,rstring ; if recevied data was zero, 0088 0003- 0212 0089 5588 larp ar0 0213 008a ca00 lack 0 ; fill rstring with zeroes 0214 008b cb1d rptk STRLEN-1 0215 008c 60a0 sacl *+ 0216 008d d001 lalk rstring ; set cptr to rstring again 008e 0003- 0217 008f 6021- sacl cptr 0218 0090 rint2: irestore !0001 0090 5589 larp ar1 !0002 0091 5590 mar *- !0003 0092 3790 lar ar7,*- !0004 0093 3690 lar ar6,*- !0005 0094 3590 lar ar5,*- !0006 0095 3490 lar ar4,*- !0007 0096 3390 lar ar3,*- !0008 0097 3290 lar ar2,*- !0009 0098 3090 lar ar0,*- !0010 0099 cb07 rptk 7 !0011 009a 5490 pshd *- !0012 009b 5590 mar *- !0013 009c 3ca0 lt *+ !0014 009d a001 mpyk 1 !0015 009e 3c90 lt *- !0016 009f 5590 mar *- !0017 00a0 5390 lph *- !0018 00a1 4190 zals *- !0019 00a2 4890 addh *- !0020 00a3 5090 lst *- !0021 00a4 5180 lst1 * 0219 00a5 ce00 eint 0220 00a6 ce26 ret 0221 0222 .end No Errors, No Warnings